Colin LeMahieu 9e989cf190 [Hexagon] Adding round reg/imm and bitsplit instructions. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225188 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-05 18:08:21 +00:00

..

AArch64

Condition codes AL and NV are invalid in the aliases that use

2014-06-10 13:11:35 +00:00

ARM

Add support for ARM modified-immediate assembly syntax.

2014-12-02 10:53:20 +00:00

Hexagon

[Hexagon] Adding round reg/imm and bitsplit instructions.

2015-01-05 18:08:21 +00:00

Mips

[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions

2014-12-23 19:55:34 +00:00

PowerPC

[PowerPC] Add support for the CMPB instruction

2015-01-03 01:16:37 +00:00

Sparc

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

SystemZ

[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA

2014-07-10 11:00:55 +00:00

X86

[X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present.

2015-01-03 00:00:20 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00