mirror of
				https://github.com/c64scene-ar/llvm-6502.git
				synced 2025-11-04 05:17:07 +00:00 
			
		
		
		
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223339 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			34 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			34 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
//===-- X86MachineFuctionInfo.cpp - X86 machine function info -------------===//
 | 
						|
//
 | 
						|
//                     The LLVM Compiler Infrastructure
 | 
						|
//
 | 
						|
// This file is distributed under the University of Illinois Open Source
 | 
						|
// License. See LICENSE.TXT for details.
 | 
						|
//
 | 
						|
//===----------------------------------------------------------------------===//
 | 
						|
 | 
						|
#include "X86MachineFunctionInfo.h"
 | 
						|
#include "X86RegisterInfo.h"
 | 
						|
#include "llvm/Target/TargetSubtargetInfo.h"
 | 
						|
 | 
						|
using namespace llvm;
 | 
						|
 | 
						|
void X86MachineFunctionInfo::anchor() { }
 | 
						|
 | 
						|
void X86MachineFunctionInfo::setRestoreBasePointer(const MachineFunction *MF) {
 | 
						|
  if (!RestoreBasePointerOffset) {
 | 
						|
    const X86RegisterInfo *RegInfo = static_cast<const X86RegisterInfo *>(
 | 
						|
      MF->getSubtarget().getRegisterInfo());
 | 
						|
    unsigned SlotSize = RegInfo->getSlotSize();
 | 
						|
    for (const MCPhysReg *CSR =
 | 
						|
      RegInfo->X86RegisterInfo::getCalleeSavedRegs(MF);
 | 
						|
      unsigned Reg = *CSR;
 | 
						|
       ++CSR)
 | 
						|
    {
 | 
						|
      if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
 | 
						|
        RestoreBasePointerOffset -= SlotSize;
 | 
						|
    }
 | 
						|
  }
 | 
						|
}
 | 
						|
 |