Amaury de la Vieuville 9eefea009f ARM: fix VMOVvnf32 decoding when ambiguous with VCVT ...

Enforce Table A7-15 (op=1, cmode=0b111) -> UNDEF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183612 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-08 13:54:05 +00:00

..

AArch64

AArch64: implement ETMv4 trace system registers.

2013-04-03 12:31:29 +00:00

ARM

ARM: fix VMOVvnf32 decoding when ambiguous with VCVT

2013-06-08 13:54:05 +00:00

MBlaze

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Mips

[mips] DSP-ASE move from HI/LO register instructions.

2013-04-18 00:52:44 +00:00

SystemZ

[SystemZ] Immediate compare-and-branch support

2013-05-29 11:58:52 +00:00

X86

Add CLAC/STAC instruction encoding/decoding support

2013-04-11 04:52:28 +00:00

XCore

[XCore] Add LDAPB instructions.

2013-05-05 13:36:53 +00:00