Jim Grosbach 9fa0a743e6 ARM two-operand aliases for VAND/VEOR/VORR instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146095 91177308-0d34-0410-b5e6-96231b3b80d8		2011-12-07 23:08:12 +00:00
..
Analysis	Probably not a good idea to convert a single vector load into a memcpy. We	2011-12-06 00:19:08 +00:00
Archive
AsmParser	Push StringRefs through the metadata interface.	2011-12-06 11:50:26 +00:00
Bitcode	Flesh out a bit more of the bitcode use-list ordering preservation code.	2011-12-07 22:49:05 +00:00
CodeGen	Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling.	2011-12-07 22:24:28 +00:00
DebugInfo
ExecutionEngine	Add bundle aware API for querying instruction properties and switch the code	2011-12-07 07:15:52 +00:00
Linker
MC	Darwin assembler improved relocs when w/o subsections_via_symbols.	2011-12-07 19:46:59 +00:00
Object
Support	Adding missing anchor to DATDeltaAlgorithm.	2011-12-07 06:44:23 +00:00
TableGen	Check for error after InstantiateMultclassDef.	2011-12-02 18:33:03 +00:00
Target	ARM two-operand aliases for VAND/VEOR/VORR instructions.	2011-12-07 23:08:12 +00:00
Transforms	Remove unused include.	2011-12-07 17:18:31 +00:00
VMCore	Push StringRefs through the metadata interface.	2011-12-06 11:50:26 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile