Aaron Ballman 80095e5f8e Replacing an empty switch with its moral equivalent. No functional changes intended. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186017 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-10 17:19:22 +00:00

..

AsmParser

Silence anonymous type in anonymous union warnings.

2013-03-15 00:42:55 +00:00

Disassembler

Remove the Copied parameter from MemoryObject::readBytes.

2013-05-24 10:54:58 +00:00

InstPrinter

[CMake] Remove dependencies to intrinsics_gen I introduced in r169724.

2012-12-11 05:53:54 +00:00

MCTargetDesc

Replacing an empty switch with its moral equivalent. No functional changes intended.

2013-07-10 17:19:22 +00:00

TargetInfo

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

CMakeLists.txt

Remove edis - the enhanced disassembler. Fixes PR14654.

2012-12-19 19:55:47 +00:00

LLVMBuild.txt

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Makefile

Remove edis - the enhanced disassembler. Fixes PR14654.

2012-12-19 19:55:47 +00:00

MBlaze.h

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MBlaze.td

Use "NoItineraries" for processors with no itineraries.

2012-06-22 03:58:51 +00:00

MBlazeAsmPrinter.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

MBlazeCallingConv.td

Remove unused CCIfSubtarget.

2012-04-17 11:29:05 +00:00

MBlazeDelaySlotFiller.cpp

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:26:43 +00:00

MBlazeFrameLowering.cpp

Add a space between closing template '>' to unbreak build.

2013-07-04 01:43:17 +00:00

MBlazeFrameLowering.h

Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo

2013-02-21 20:05:00 +00:00

MBlazeInstrFormats.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeInstrFPU.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeInstrFSL.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeInstrInfo.cpp

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:26:43 +00:00

MBlazeInstrInfo.h

Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.

2012-03-17 18:46:09 +00:00

MBlazeInstrInfo.td

Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.

2013-04-20 12:32:17 +00:00

MBlazeIntrinsicInfo.cpp

Check that a function starts with llvm. before using GET_FUNCTION_RECOGNIZER.

2013-05-22 14:57:42 +00:00

MBlazeIntrinsicInfo.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeIntrinsics.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeISelDAGToDAG.cpp

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

MBlazeISelLowering.cpp

The getRegForInlineAsmConstraint function should only accept MVT value types.

2013-06-22 18:37:38 +00:00

MBlazeISelLowering.h

The getRegForInlineAsmConstraint function should only accept MVT value types.

2013-06-22 18:37:38 +00:00

MBlazeMachineFunction.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeMachineFunction.h

Sort includes for all of the .h files under the 'lib' tree. These were

2012-12-04 07:12:27 +00:00

MBlazeMCInstLower.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

MBlazeMCInstLower.h

Remove unused private fields found by clang's new -Wunused-private-field.

2012-06-06 18:25:08 +00:00

MBlazeRegisterInfo.cpp

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:26:43 +00:00

MBlazeRegisterInfo.h

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:26:43 +00:00

MBlazeRegisterInfo.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeRelocations.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeSchedule3.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeSchedule5.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

MBlazeSchedule.td

Use "NoItineraries" for processors with no itineraries.

2012-06-22 03:58:51 +00:00

MBlazeSelectionDAGInfo.cpp

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MBlazeSelectionDAGInfo.h

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MBlazeSubtarget.cpp

misched: Added MultiIssueItineraries.

2012-06-05 03:44:40 +00:00

MBlazeSubtarget.h

Sort includes for all of the .h files under the 'lib' tree. These were

2012-12-04 07:12:27 +00:00

MBlazeTargetMachine.cpp

Remove the MachineMove class.

2013-05-13 01:16:13 +00:00

MBlazeTargetMachine.h

Switch TargetTransformInfo from an immutable analysis pass that requires

2013-01-07 01:37:14 +00:00

MBlazeTargetObjectFile.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

MBlazeTargetObjectFile.h

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TODO

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