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https://github.com/c64scene-ar/llvm-6502.git
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f09378397e
per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
2.7 KiB
C++
87 lines
2.7 KiB
C++
//===-- BPFInstPrinter.cpp - Convert BPF MCInst to asm syntax -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an BPF MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "BPF.h"
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#include "BPFInstPrinter.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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// Include the auto-generated portion of the assembly writer.
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#include "BPFGenAsmWriter.inc"
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void BPFInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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StringRef Annot, const MCSubtargetInfo &STI) {
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printInstruction(MI, O);
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printAnnotation(O, Annot);
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}
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static void printExpr(const MCExpr *Expr, raw_ostream &O) {
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const MCSymbolRefExpr *SRE;
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if (const MCBinaryExpr *BE = dyn_cast<MCBinaryExpr>(Expr))
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SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
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else
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SRE = dyn_cast<MCSymbolRefExpr>(Expr);
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assert(SRE && "Unexpected MCExpr type.");
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MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
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assert(Kind == MCSymbolRefExpr::VK_None);
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O << *Expr;
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}
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void BPFInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O, const char *Modifier) {
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assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isReg()) {
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O << getRegisterName(Op.getReg());
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} else if (Op.isImm()) {
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O << (int32_t)Op.getImm();
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} else {
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assert(Op.isExpr() && "Expected an expression");
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printExpr(Op.getExpr(), O);
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}
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}
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void BPFInstPrinter::printMemOperand(const MCInst *MI, int OpNo, raw_ostream &O,
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const char *Modifier) {
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const MCOperand &RegOp = MI->getOperand(OpNo);
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const MCOperand &OffsetOp = MI->getOperand(OpNo + 1);
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// offset
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if (OffsetOp.isImm())
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O << formatDec(OffsetOp.getImm());
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else
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assert(0 && "Expected an immediate");
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// register
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assert(RegOp.isReg() && "Register operand not a register");
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O << '(' << getRegisterName(RegOp.getReg()) << ')';
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}
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void BPFInstPrinter::printImm64Operand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isImm())
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O << (uint64_t)Op.getImm();
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else
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O << Op;
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}
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