Hal Finkel dc8efbae14 Fix PowerPC/cttz.ll to specify a cpu (and use FileCheck) ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178472 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-01 16:31:56 +00:00

..

AArch64

Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings

2013-03-26 18:56:54 +00:00

ARM

Remove the old CodePlacementOpt pass.

2013-03-29 17:14:24 +00:00

CPP

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Generic

XFAIL some of the generic CodeGen tests for Hexagon.

2013-03-25 21:04:16 +00:00

Hexagon

Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.

2013-03-28 19:34:49 +00:00

Inputs

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

MBlaze

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

Mips

[mips] Add patterns for DSP indexed load instructions.

2013-03-30 02:14:45 +00:00

MSP430

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

NVPTX

[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.

2013-03-30 14:29:30 +00:00

PowerPC

Fix PowerPC/cttz.ll to specify a cpu (and use FileCheck)

2013-04-01 16:31:56 +00:00

R600

R600/SI: add SETO/SETUO patterns

2013-03-27 15:27:31 +00:00

SI

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SPARC

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

Thumb

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

Thumb2

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X86

X86: Promote sitofp <8 x i16> to <8 x i32> when AVX is available.

2013-03-31 12:49:15 +00:00

XCore

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00