mirror of
https://github.com/c64scene-ar/llvm-6502.git
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5443e7d790
Now that 3.3 is branched, we are re-enabling virtual registers to help iron out bugs before the next release. Some of the post-RA passes do not play well with virtual registers, so we disable them for now. The needed functionality of the PrologEpilogInserter pass is copied to a new backend-specific NVPTXPrologEpilog pass. The test for this commit is not breaking the existing tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182998 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
956 B
CMake
37 lines
956 B
CMake
set(LLVM_TARGET_DEFINITIONS NVPTX.td)
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tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(NVPTXCommonTableGen)
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set(NVPTXCodeGen_sources
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NVPTXFrameLowering.cpp
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NVPTXInstrInfo.cpp
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NVPTXISelDAGToDAG.cpp
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NVPTXISelLowering.cpp
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NVPTXRegisterInfo.cpp
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NVPTXSubtarget.cpp
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NVPTXTargetMachine.cpp
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NVPTXSplitBBatBar.cpp
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NVPTXLowerAggrCopies.cpp
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NVPTXutil.cpp
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NVPTXAllocaHoisting.cpp
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NVPTXAsmPrinter.cpp
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NVPTXUtilities.cpp
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NVVMReflect.cpp
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NVPTXGenericToNVVM.cpp
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NVPTXPrologEpilogPass.cpp
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)
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add_llvm_target(NVPTXCodeGen ${NVPTXCodeGen_sources})
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add_dependencies(LLVMNVPTXCodeGen intrinsics_gen)
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add_subdirectory(TargetInfo)
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add_subdirectory(InstPrinter)
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add_subdirectory(MCTargetDesc)
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