Misha Brukman a31f1f7cb2 * Add the lost fix to define the second reg of a 2-reg representation of longs ...

* Fix opcode RLWNM -> RLWINM since it uses an immediate const shift value


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15087 91177308-0d34-0410-b5e6-96231b3b80d8

2004-07-21 20:30:18 +00:00

..

CBackend

Emit NaNs and INFs bit-identically to the bytecode file, if the system has

2004-07-21 03:15:26 +00:00

PowerPC

* Add the lost fix to define the second reg of a 2-reg representation of longs

2004-07-21 20:30:18 +00:00

Skeleton

Fix grammar.

2004-07-16 17:40:28 +00:00

Sparc

CPR fixes

2004-07-18 07:26:17 +00:00

SparcV8

CPR fixes

2004-07-18 07:26:17 +00:00

SparcV9

bug 122:

2004-07-19 13:25:02 +00:00

X86

While I'm at it, don't break codegen of mul by 3,5,9.

2004-07-19 23:50:57 +00:00

Makefile

Build the skeleton target

2004-07-16 07:11:53 +00:00

MRegisterInfo.cpp

Put all LLVM code into the llvm namespace, as per bug 109.

2003-11-11 22:41:34 +00:00

Target.td

Expose the "Other" value type to tablegen targets

2004-02-11 03:08:45 +00:00

TargetData.cpp

Nuke a clearly bogus assertion

2004-07-15 07:44:34 +00:00

TargetFrameInfo.cpp

Move implementations of functions here, which avoids #including <cstdlib> in the

2004-03-11 23:52:43 +00:00

TargetInstrInfo.cpp

Adjust to change in TII ctor arguments

2004-02-29 06:31:44 +00:00

TargetMachine.cpp

Direct declaration of namespace-ified globals does not work, must enclose

2004-06-21 21:44:12 +00:00

TargetMachineRegistry.cpp

Implement TargetRegistrationListener

2004-07-11 06:03:21 +00:00

TargetSchedInfo.cpp

Adjust to new TM interface

2004-06-02 05:56:04 +00:00