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target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
124 lines
4.6 KiB
C++
124 lines
4.6 KiB
C++
//=== MC/MCRegisterInfo.h - Target Register Description ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes an abstract interface used to get information about a
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// target machines register file. This information is used for a variety of
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// purposed, especially register allocation.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_MC_MCREGISTERINFO_H
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#define LLVM_MC_MCREGISTERINFO_H
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#include <cassert>
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namespace llvm {
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/// TargetRegisterDesc - This record contains all of the information known about
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/// a particular register. The Overlaps field contains a pointer to a zero
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/// terminated array of registers that this register aliases, starting with
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/// itself. This is needed for architectures like X86 which have AL alias AX
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/// alias EAX. The SubRegs field is a zero terminated array of registers that
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/// are sub-registers of the specific register, e.g. AL, AH are sub-registers of
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/// AX. The SuperRegs field is a zero terminated array of registers that are
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/// super-registers of the specific register, e.g. RAX, EAX, are super-registers
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/// of AX.
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///
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struct TargetRegisterDesc {
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const char *Name; // Printable name for the reg (for debugging)
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const unsigned *Overlaps; // Overlapping registers, described above
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const unsigned *SubRegs; // Sub-register set, described above
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const unsigned *SuperRegs; // Super-register set, described above
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};
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/// MCRegisterInfo base class - We assume that the target defines a static
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/// array of TargetRegisterDesc objects that represent all of the machine
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/// registers that the target has. As such, we simply have to track a pointer
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/// to this array so that we can turn register number into a register
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/// descriptor.
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///
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class MCRegisterInfo {
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private:
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const TargetRegisterDesc *Desc; // Pointer to the descriptor array
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unsigned NumRegs; // Number of entries in the array
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public:
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/// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen
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/// auto-generated routines. *DO NOT USE*.
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void InitMCRegisterInfo(const TargetRegisterDesc *D, unsigned NR) {
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Desc = D;
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NumRegs = NR;
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}
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const TargetRegisterDesc &operator[](unsigned RegNo) const {
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assert(RegNo < NumRegs &&
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"Attempting to access record for invalid register number!");
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return Desc[RegNo];
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}
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/// Provide a get method, equivalent to [], but more useful if we have a
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/// pointer to this object.
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///
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const TargetRegisterDesc &get(unsigned RegNo) const {
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return operator[](RegNo);
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}
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/// getAliasSet - Return the set of registers aliased by the specified
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/// register, or a null list of there are none. The list returned is zero
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/// terminated.
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///
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const unsigned *getAliasSet(unsigned RegNo) const {
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// The Overlaps set always begins with Reg itself.
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return get(RegNo).Overlaps + 1;
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}
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/// getOverlaps - Return a list of registers that overlap Reg, including
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/// itself. This is the same as the alias set except Reg is included in the
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/// list.
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/// These are exactly the registers in { x | regsOverlap(x, Reg) }.
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///
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const unsigned *getOverlaps(unsigned RegNo) const {
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return get(RegNo).Overlaps;
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}
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/// getSubRegisters - Return the list of registers that are sub-registers of
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/// the specified register, or a null list of there are none. The list
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/// returned is zero terminated and sorted according to super-sub register
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/// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH.
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///
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const unsigned *getSubRegisters(unsigned RegNo) const {
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return get(RegNo).SubRegs;
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}
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/// getSuperRegisters - Return the list of registers that are super-registers
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/// of the specified register, or a null list of there are none. The list
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/// returned is zero terminated and sorted according to super-sub register
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/// relations. e.g. X86::AL's super-register list is AX, EAX, RAX.
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///
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const unsigned *getSuperRegisters(unsigned RegNo) const {
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return get(RegNo).SuperRegs;
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}
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/// getName - Return the human-readable symbolic target-specific name for the
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/// specified physical register.
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const char *getName(unsigned RegNo) const {
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return get(RegNo).Name;
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}
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/// getNumRegs - Return the number of registers this target has (useful for
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/// sizing arrays holding per register information)
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unsigned getNumRegs() const {
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return NumRegs;
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}
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};
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} // End llvm namespace
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#endif
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