Sanjiv Gupta a43a7aefd7 Allow libcalls for i16 sdiv/udiv/rem operations. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72941 91177308-0d34-0410-b5e6-96231b3b80d8

2009-06-05 14:41:10 +00:00

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CallingConvLower.cpp

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CMakeLists.txt

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DAGCombiner.cpp

Don't do the X * 0.0 -> 0.0 transformation in instcombine, because

2009-06-04 17:12:12 +00:00

FastISel.cpp

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

LegalizeDAG.cpp

Re-commit r72514 and r72516 with a fixed version of BR_CC lowering.

2009-05-28 20:40:34 +00:00

LegalizeFloatTypes.cpp

Rename CustomLowerResults to CustomLowerNode, since

2009-05-31 04:15:38 +00:00

LegalizeIntegerTypes.cpp

Allow libcalls for i16 sdiv/udiv/rem operations.

2009-06-05 14:41:10 +00:00

LegalizeTypes.cpp

Rename CustomLowerResults to CustomLowerNode, since

2009-05-31 04:15:38 +00:00

LegalizeTypes.h

Revert 72707 and 72709, for the moment.

2009-06-02 03:12:52 +00:00

LegalizeTypesGeneric.cpp

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LegalizeVectorOps.cpp

Remove special cases for more opcodes.

2009-05-27 07:58:35 +00:00

LegalizeVectorTypes.cpp

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Makefile

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ScheduleDAGFast.cpp

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ScheduleDAGList.cpp

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ScheduleDAGRRList.cpp

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ScheduleDAGSDNodes.cpp

Revert 72707 and 72709, for the moment.

2009-06-02 03:12:52 +00:00

ScheduleDAGSDNodes.h

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ScheduleDAGSDNodesEmit.cpp

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SelectionDAG.cpp

Don't do the X * 0.0 -> 0.0 transformation in instcombine, because

2009-06-04 17:12:12 +00:00

SelectionDAGBuild.cpp

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

SelectionDAGBuild.h

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

SelectionDAGISel.cpp

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SelectionDAGPrinter.cpp

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TargetLowering.cpp

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