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a52d7da1d8c424276f79b80c89ed045166083730
llvm-6502/test/MC/Disassembler/ARM
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Johnny Chen a52d7da1d8 Fix single word and unsigned byte data transfer instruction encodings so that
Inst{4} = 0.

rdar://problem/9213022


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 19:28:35 +00:00
..
arm-tests.txt
Add BLXi to the instruction table for disassembly purpose.
2011-03-31 17:53:50 +00:00
dg.exp
…
invalid-CPS2p-arm.txt
Also need to handle invalid imod values for CPS2p.
2011-03-25 17:03:12 +00:00
invalid-CPS3p-arm.txt
Plug a leak in the arm disassembler and put the tests back.
2011-03-24 21:14:28 +00:00
invalid-LDRrs-arm.txt
Fix single word and unsigned byte data transfer instruction encodings so that
2011-03-31 19:28:35 +00:00
invalid-VLDMSDB_UPD-arm.txt
Rename invalid-VLDMSDB-arm.txt to be invalid-VLDMSDB_UPD-arm.txt.
2011-03-29 19:10:06 +00:00
neon-tests.txt
Handle the added VBICiv*i* NEON instructions, too.
2011-03-24 22:04:39 +00:00
thumb-printf.txt
Add a thumb test file for printf (iOS 4.3).
2011-03-29 21:09:30 +00:00
thumb-tests.txt
Add a test case for thumb stc2 instruction.
2011-03-30 01:02:06 +00:00
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