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a7710edd98d71a81c43f8e3889cf0c790885d1b8
llvm-6502/test/CodeGen
History
Rafael Espindola 6cac2025da Add a triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138831 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 21:19:37 +00:00
..
Alpha
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ARM
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
2011-08-30 01:34:54 +00:00
Blackfin
more tests not making the jump into the brave new world.
2011-07-09 16:57:10 +00:00
CBackend
Revert r137134. It breaks some code as Eli pointed out.
2011-08-09 18:56:35 +00:00
CellSPU
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CPP
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Generic
Revert r138606 until LowerInvoke has been converted to the new EH scheme.
2011-08-26 21:11:23 +00:00
MBlaze
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Mips
Use subword loads instead of a 4-byte load when the size of a structure (or a
2011-08-18 23:39:37 +00:00
MSP430
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PowerPC
Set CR1EQ only when lowering vararg floating arguments (not any vararg
2011-08-30 17:04:16 +00:00
PTX
PTX: Add initial support for device function calls
2011-08-09 17:36:31 +00:00
SPARC
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SystemZ
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Thumb
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Thumb2
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
2011-08-30 01:34:54 +00:00
X86
Add a triple.
2011-08-30 21:19:37 +00:00
XCore
Add Uses=[SP] to call instructions. This fixes a miscompilation with a
2011-08-24 13:32:43 +00:00
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