Dan Gohman a7ce741ff0 Use the SubclassData field to hold ExtType, isTrunc, and MemIndexedMode ...

information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63577 91177308-0d34-0410-b5e6-96231b3b80d8

2009-02-03 00:08:45 +00:00

..

CallingConvLower.cpp

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CMakeLists.txt

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DAGCombiner.cpp

Fix PR3453 and probably a bunch of other potential

2009-02-01 18:06:53 +00:00

FastISel.cpp

Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.

2009-01-22 09:10:11 +00:00

LegalizeDAG.cpp

Last DebugLoc propagation for this file.

2009-02-02 23:46:53 +00:00

LegalizeFloatTypes.cpp

Remove trailing spaces.

2009-02-02 19:46:41 +00:00

LegalizeIntegerTypes.cpp

Remove trailing spaces.

2009-02-02 19:46:41 +00:00

LegalizeTypes.cpp

DebugLoc propagation. Done with file.

2009-01-31 20:01:02 +00:00

LegalizeTypes.h

Duncan's patch. Further to 64382. Takes care of illegal types for shift amount.

2009-02-02 17:19:39 +00:00

LegalizeTypesGeneric.cpp

Remove trailing spaces.

2009-02-02 19:46:41 +00:00

LegalizeVectorTypes.cpp

Preserve more SourceValue information.

2009-02-02 06:37:55 +00:00

Makefile

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ScheduleDAGFast.cpp

Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph

2009-01-15 19:20:50 +00:00

ScheduleDAGList.cpp

Initial hazard recognizer support in post-pass scheduling. This includes

2009-01-16 01:33:36 +00:00

ScheduleDAGRRList.cpp

Make a few things const, fix some comments, and simplify

2009-01-29 19:49:27 +00:00

ScheduleDAGSDNodes.cpp

CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.

2009-01-16 20:57:18 +00:00

ScheduleDAGSDNodesEmit.cpp

Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.

2009-01-22 09:10:11 +00:00

SelectionDAG.cpp

Use the SubclassData field to hold ExtType, isTrunc, and MemIndexedMode

2009-02-03 00:08:45 +00:00

SelectionDAGBuild.cpp

Fix PR3401: when using large integers, the type

2009-01-31 15:50:11 +00:00

SelectionDAGBuild.h

Move CurDebugLoc into SelectionDAGLowering.

2009-01-31 02:22:37 +00:00

SelectionDAGISel.cpp

Rename getAnalysisToUpdate to getAnalysisIfAvailable.

2009-01-28 13:14:17 +00:00

SelectionDAGPrinter.cpp

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TargetLowering.cpp

Fix PR3401: when using large integers, the type

2009-01-31 15:50:11 +00:00