Vasileios Kalintiris eaf8f5efe9 [mips] Add support for COP1's Branch-On-Cond-Likely instructions ...

Summary: Depends on D5782

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220042 91177308-0d34-0410-b5e6-96231b3b80d8

2014-10-17 14:08:28 +00:00

..

invalid-mips32.s

[mips] SYNC $stype instruction was added in Mips32

2014-06-18 17:10:30 +00:00

invalid-mips32r2.s

[mips] Marked the DI/EI instruction aliases as MIPS32r2

2014-10-16 15:23:52 +00:00

invalid-mips64.s

[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).

2014-06-11 15:05:56 +00:00

invalid-mips64r2-xfail.s

[mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2

2014-05-14 15:35:03 +00:00

invalid-mips64r2.s

[mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2

2014-05-14 15:35:03 +00:00

valid-xfail.s

Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...

2014-08-17 19:47:47 +00:00

valid.s

[mips] Add support for COP1's Branch-On-Cond-Likely instructions

2014-10-17 14:08:28 +00:00