Evan Cheng a8e8984ee4 Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77939 91177308-0d34-0410-b5e6-96231b3b80d8

2009-08-03 02:38:06 +00:00

..

Alpha

Make promotion in operation legalization for SETCC work correctly.

2009-07-17 05:16:04 +00:00

ARM

switch to filecheck format

2009-08-02 00:32:26 +00:00

Blackfin

Remove unneeded intrinsics from Blackfin backend.

2009-08-02 21:49:05 +00:00

CBackend

Fix an erroneous check for isFNeg; the FNeg case is handled

2009-06-04 23:43:29 +00:00

CellSPU

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16 06:58:29 +00:00

CPP

Fix code emission for conditional branches.

2009-05-04 19:10:38 +00:00

Generic

Remove the IA-64 backend.

2009-07-24 00:30:09 +00:00

Mips

Remove SectionKind::Small*. This was only used on mips, and is apparently

2009-07-24 03:11:51 +00:00

MSP430

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

PIC16

Test case to check that separate section is created for a global variable specified with section attribute.

2009-07-27 16:20:41 +00:00

PowerPC

Revert r75663 (and r76805), as it is causing regressions on powerpc.

2009-07-23 00:09:46 +00:00

SPARC

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

SystemZ

convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin"

2009-07-21 17:36:24 +00:00

Thumb

tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.

2009-07-28 07:38:35 +00:00

Thumb2

Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well.

2009-08-03 02:38:06 +00:00

X86

fix a problem Eli noticed where we would compile the attached ptrtoint

2009-08-01 22:25:12 +00:00

XCore

Add extra SEXT pattern.

2009-08-02 22:45:24 +00:00