Kit Barton f60b0de42a This change implements the following three logical vector operations: ... veqv (vector equivalence) vnand vorc I increased the AddedComplexity for these instructions to 500 to ensure they are generated instead of issuing other VSX instructions. Phabricator review: http://reviews.llvm.org/D7469 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228580 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-09 17:03:18 +00:00
..
AArch64
ARM
AsmParser
COFF	MC: Calculate intra-section symbol differences correctly for COFF	2015-02-09 06:31:31 +00:00
Disassembler	This change implements the following three logical vector operations:	2015-02-09 17:03:18 +00:00
ELF
Hexagon
MachO
Markup
Mips
PowerPC	This change implements the following three logical vector operations:	2015-02-09 17:03:18 +00:00
R600
Sparc
SystemZ
X86