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llvm-6502/lib/Target/SparcV9
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Jim Laskey a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 13:48:33 +00:00
..
InstrSched
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LiveVar
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ModuloScheduling
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RegAlloc
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.cvsignore
Ignore the burg output files.
2006-03-24 02:21:35 +00:00
DecomposeMultiDimRefs.cpp
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EmitBytecodeToAssembly.cpp
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InternalGlobalMapper.cpp
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MachineCodeForInstruction.cpp
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MachineCodeForInstruction.h
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MachineFunctionInfo.cpp
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MachineFunctionInfo.h
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MachineInstrAnnot.h
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Makefile
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MappingInfo.cpp
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MappingInfo.h
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SparcV9_F2.td
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SparcV9_F3.td
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SparcV9_F4.td
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SparcV9.burg.in
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SparcV9.td
PHI and INLINEASM are now built-in instructions provided by Target.td
2006-01-27 01:46:15 +00:00
SparcV9AsmPrinter.cpp
Adjust to MachineConstantPool interface change: instead of keeping a
2006-02-09 04:46:04 +00:00
SparcV9BurgISel.cpp
Eliminate IntrinsicLowering from TargetMachine.
2006-03-23 05:43:16 +00:00
SparcV9BurgISel.h
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SparcV9CodeEmitter.cpp
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SparcV9CodeEmitter.h
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SparcV9FrameInfo.cpp
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SparcV9FrameInfo.h
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SparcV9Instr.def
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SparcV9InstrForest.h
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SparcV9InstrInfo.h
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SparcV9InstrInfo.td
PHI and INLINEASM are now built-in instructions provided by Target.td
2006-01-27 01:46:15 +00:00
SparcV9Internals.h
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SparcV9JITInfo.cpp
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SparcV9JITInfo.h
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SparcV9PeepholeOpts.cpp
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SparcV9PreSelection.cpp
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SparcV9PrologEpilogInserter.cpp
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SparcV9RegClassInfo.cpp
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SparcV9RegClassInfo.h
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SparcV9RegInfo.cpp
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SparcV9RegInfo.h
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SparcV9RegisterInfo.cpp
Expose base register for DwarfWriter. Refactor code accordingly.
2006-03-28 13:48:33 +00:00
SparcV9RegisterInfo.h
Expose base register for DwarfWriter. Refactor code accordingly.
2006-03-28 13:48:33 +00:00
SparcV9RegisterInfo.td
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SparcV9Relocations.h
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SparcV9SchedInfo.cpp
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SparcV9StackSlots.cpp
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SparcV9TargetMachine.cpp
Eliminate IntrinsicLowering from TargetMachine.
2006-03-23 05:43:16 +00:00
SparcV9TargetMachine.h
Eliminate IntrinsicLowering from TargetMachine.
2006-03-23 05:43:16 +00:00
SparcV9TmpInstr.cpp
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SparcV9TmpInstr.h
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