Matt Arsenault 848d9223c5 R600/SI: Fix verifier error from a branch on IMPLICIT_DEF ...

SIILowerI1Copies wasn't correctly handling this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222020 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-14 18:43:41 +00:00

..

AsmParser

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

InstPrinter

R600/SI: Change how DS offsets are printed

2014-10-10 22:16:07 +00:00

MCTargetDesc

R600: Fix assert on empty function

2014-11-13 20:07:40 +00:00

TargetInfo

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AMDGPU.h

Reapply: R600: Make sure to inline all internal functions

2014-11-03 19:49:05 +00:00

AMDGPU.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

AMDGPUAlwaysInlinePass.cpp

Reapply: R600: Make sure to inline all internal functions

2014-11-03 19:49:05 +00:00

AMDGPUAsmPrinter.cpp

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AMDGPUAsmPrinter.h

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AMDGPUCallingConv.td

…

AMDGPUFrameLowering.cpp

…

AMDGPUFrameLowering.h

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AMDGPUInstrInfo.cpp

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AMDGPUInstrInfo.h

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AMDGPUInstrInfo.td

R600/SI: Fix fmin_legacy / fmax_legacy matching for SI

2014-11-13 23:03:09 +00:00

AMDGPUInstructions.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

AMDGPUIntrinsicInfo.cpp

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AMDGPUIntrinsicInfo.h

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AMDGPUIntrinsics.td

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AMDGPUISelDAGToDAG.cpp

R600/SI: Get rid of FCLAMP_SI pseudo

2014-11-13 19:49:04 +00:00

AMDGPUISelLowering.cpp

R600/SI: Match integer min / max instructions

2014-11-14 18:30:06 +00:00

AMDGPUISelLowering.h

R600/SI: Match integer min / max instructions

2014-11-14 18:30:06 +00:00

AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

Reapply "R600: Add new intrinsic to read work dimensions"

2014-10-14 20:05:26 +00:00

AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPUPromoteAlloca.cpp

R600: Don't promote allocas when one of the users is a ptrtoint instruction

2014-10-31 20:52:04 +00:00

AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUSubtarget.cpp

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AMDGPUSubtarget.h

R600: Remove unused define

2014-11-07 20:45:00 +00:00

AMDGPUTargetMachine.cpp

This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively

2014-11-13 09:26:31 +00:00

AMDGPUTargetMachine.h

This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively

2014-11-13 09:26:31 +00:00

AMDGPUTargetTransformInfo.cpp

Fix broken doxygen annotations, NFC

2014-11-12 18:25:06 +00:00

AMDILCFGStructurizer.cpp

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CaymanInstructions.td

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CMakeLists.txt

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

EvergreenInstructions.td

R600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs

2014-11-02 23:46:54 +00:00

LLVMBuild.txt

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

Makefile

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

Processors.td

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R600ClauseMergePass.cpp

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R600ControlFlowFinalizer.cpp

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R600Defines.h

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R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600InstrFormats.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

R600InstrInfo.cpp

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R600InstrInfo.h

…

R600Instructions.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

Reapply "R600: Add new intrinsic to read work dimensions"

2014-10-14 20:05:26 +00:00

R600ISelLowering.h

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

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R600MachineScheduler.h

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R600OptimizeVectorRegisters.cpp

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R600Packetizer.cpp

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R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

…

R600TextureIntrinsicsReplacer.cpp

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R700Instructions.td

…

SIAnnotateControlFlow.cpp

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SIDefines.h

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SIFixSGPRCopies.cpp

R600/SI: Simplify debug printing

2014-10-17 00:36:20 +00:00

SIFixSGPRLiveRanges.cpp

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SIInsertWaits.cpp

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SIInstrFormats.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

SIInstrInfo.cpp

Fix unused variable warning without asserts

2014-11-14 18:40:49 +00:00

SIInstrInfo.h

R600/SI: Use S_BFE_I64 for 64-bit sext_inreg

2014-11-14 18:18:16 +00:00

SIInstrInfo.td

R600/SI: Use S_BFE_I64 for 64-bit sext_inreg

2014-11-14 18:18:16 +00:00

SIInstructions.td

R600/SI: Use S_BFE_I64 for 64-bit sext_inreg

2014-11-14 18:18:16 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

R600/SI: Use S_BFE_I64 for 64-bit sext_inreg

2014-11-14 18:18:16 +00:00

SIISelLowering.h

R600/SI: Move all rsrc building functions to SIISelLowering

2014-11-05 19:01:19 +00:00

SILoadStoreOptimizer.cpp

Work around bugs in MSVC "14" CTP 3's conversion logic

2014-10-31 23:19:46 +00:00

SILowerControlFlow.cpp

R600/SI: Use s_movk_i32

2014-11-13 20:44:23 +00:00

SILowerI1Copies.cpp

R600/SI: Fix verifier error from a branch on IMPLICIT_DEF

2014-11-14 18:43:41 +00:00

SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIRegisterInfo.cpp

R600/SI: Make constant array static

2014-11-14 02:21:58 +00:00

SIRegisterInfo.h

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SIRegisterInfo.td

R600/SI: Fix assembly names for exec_hi and exec_lo

2014-11-14 14:08:04 +00:00

SISchedule.td

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SIShrinkInstructions.cpp

R600/SI: Use s_movk_i32

2014-11-13 20:44:23 +00:00

SITypeRewriter.cpp

Revert "IR: MDNode => Value"

2014-11-11 21:30:22 +00:00