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https://github.com/c64scene-ar/llvm-6502.git
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d714fcf5c8
Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238192 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
2.5 KiB
C++
72 lines
2.5 KiB
C++
//===-- ARMAsmBackend.h - ARM Assembler Backend -----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
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#define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
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#include "MCTargetDesc/ARMFixupKinds.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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using namespace llvm;
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namespace {
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class ARMAsmBackend : public MCAsmBackend {
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const MCSubtargetInfo *STI;
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bool isThumbMode; // Currently emitting Thumb code.
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bool IsLittleEndian; // Big or little endian.
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public:
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ARMAsmBackend(const Target &T, StringRef TT, bool IsLittle)
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: MCAsmBackend(), STI(ARM_MC::createARMMCSubtargetInfo(TT, "", "")),
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isThumbMode(TT.startswith("thumb")), IsLittleEndian(IsLittle) {}
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~ARMAsmBackend() override { delete STI; }
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unsigned getNumFixupKinds() const override {
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return ARM::NumTargetFixupKinds;
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}
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bool hasNOP() const { return STI->getFeatureBits()[ARM::HasV6T2Ops]; }
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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/// processFixupValue - Target hook to process the literal value of a fixup
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/// if necessary.
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void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFixup &Fixup, const MCFragment *DF,
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const MCValue &Target, uint64_t &Value,
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bool &IsResolved) override;
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value, bool IsPCRel) const override;
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unsigned getRelaxedOpcode(unsigned Op) const;
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bool mayNeedRelaxation(const MCInst &Inst) const override;
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override;
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void relaxInstruction(const MCInst &Inst, MCInst &Res) const override;
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
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void handleAssemblerFlag(MCAssemblerFlag Flag) override;
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unsigned getPointerSize() const { return 4; }
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bool isThumb() const { return isThumbMode; }
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void setIsThumb(bool it) { isThumbMode = it; }
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bool isLittle() const { return IsLittleEndian; }
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};
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} // end anonymous namespace
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#endif
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