mirror of
https://github.com/c64scene-ar/llvm-6502.git
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0ace3c01f7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238556 91177308-0d34-0410-b5e6-96231b3b80d8
252 lines
8.8 KiB
C++
252 lines
8.8 KiB
C++
//===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "Hexagon.h"
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#include "MCTargetDesc/HexagonBaseInfo.h"
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#include "MCTargetDesc/HexagonMCInstrInfo.h"
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#include "MCTargetDesc/HexagonMCTargetDesc.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCDisassembler.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixedLenDisassembler.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrDesc.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Endian.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/LEB128.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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#include <array>
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#include <vector>
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using namespace llvm;
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using namespace Hexagon;
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#define DEBUG_TYPE "hexagon-disassembler"
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// Pull DecodeStatus and its enum values into the global namespace.
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typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
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namespace {
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/// \brief Hexagon disassembler for all Hexagon platforms.
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class HexagonDisassembler : public MCDisassembler {
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public:
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std::unique_ptr<MCInst *> CurrentBundle;
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HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
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: MCDisassembler(STI, Ctx), CurrentBundle(new MCInst *) {}
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DecodeStatus getSingleInstruction(MCInst &Instr, MCInst &MCB,
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ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &VStream, raw_ostream &CStream,
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bool &Complete) const;
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DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
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ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &VStream,
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raw_ostream &CStream) const override;
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};
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}
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static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t Address, const void *Decoder);
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static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t Address, const void *Decoder);
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static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t Address, void const *Decoder);
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static const uint16_t IntRegDecoderTable[] = {
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Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
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Hexagon::R5, Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9,
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Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,
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Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
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Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,
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Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
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Hexagon::R30, Hexagon::R31 };
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static const uint16_t PredRegDecoderTable[] = { Hexagon::P0, Hexagon::P1,
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Hexagon::P2, Hexagon::P3 };
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static DecodeStatus DecodeRegisterClass(MCInst &Inst, unsigned RegNo,
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const uint16_t Table[], size_t Size) {
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if (RegNo < Size) {
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Inst.addOperand(MCOperand::createReg(Table[RegNo]));
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return MCDisassembler::Success;
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}
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else
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return MCDisassembler::Fail;
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}
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static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t /*Address*/,
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void const *Decoder) {
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if (RegNo > 31)
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return MCDisassembler::Fail;
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unsigned Register = IntRegDecoderTable[RegNo];
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t /*Address*/, const void *Decoder) {
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static const uint16_t CtrlRegDecoderTable[] = {
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Hexagon::SA0, Hexagon::LC0, Hexagon::SA1, Hexagon::LC1,
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Hexagon::P3_0, Hexagon::NoRegister, Hexagon::C6, Hexagon::C7,
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Hexagon::USR, Hexagon::PC, Hexagon::UGP, Hexagon::GP,
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Hexagon::CS0, Hexagon::CS1, Hexagon::UPCL, Hexagon::UPCH
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};
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if (RegNo >= sizeof(CtrlRegDecoderTable) / sizeof(CtrlRegDecoderTable[0]))
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return MCDisassembler::Fail;
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if (CtrlRegDecoderTable[RegNo] == Hexagon::NoRegister)
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return MCDisassembler::Fail;
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unsigned Register = CtrlRegDecoderTable[RegNo];
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t /*Address*/, void const *Decoder) {
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static const uint16_t CtrlReg64DecoderTable[] = {
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Hexagon::C1_0, Hexagon::NoRegister,
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Hexagon::C3_2, Hexagon::NoRegister,
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Hexagon::NoRegister, Hexagon::NoRegister,
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Hexagon::C7_6, Hexagon::NoRegister,
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Hexagon::C9_8, Hexagon::NoRegister,
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Hexagon::C11_10, Hexagon::NoRegister,
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Hexagon::CS, Hexagon::NoRegister,
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Hexagon::UPC, Hexagon::NoRegister
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};
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if (RegNo >= sizeof(CtrlReg64DecoderTable) / sizeof(CtrlReg64DecoderTable[0]))
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return MCDisassembler::Fail;
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if (CtrlReg64DecoderTable[RegNo] == Hexagon::NoRegister)
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return MCDisassembler::Fail;
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unsigned Register = CtrlReg64DecoderTable[RegNo];
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t /*Address*/, const void *Decoder) {
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unsigned Register = 0;
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switch (RegNo) {
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case 0:
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Register = Hexagon::M0;
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break;
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case 1:
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Register = Hexagon::M1;
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break;
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default:
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return MCDisassembler::Fail;
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}
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t /*Address*/, const void *Decoder) {
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static const uint16_t DoubleRegDecoderTable[] = {
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Hexagon::D0, Hexagon::D1, Hexagon::D2, Hexagon::D3,
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Hexagon::D4, Hexagon::D5, Hexagon::D6, Hexagon::D7,
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Hexagon::D8, Hexagon::D9, Hexagon::D10, Hexagon::D11,
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Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15
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};
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return (DecodeRegisterClass(Inst, RegNo >> 1,
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DoubleRegDecoderTable,
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sizeof (DoubleRegDecoderTable)));
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}
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static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t /*Address*/,
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void const *Decoder) {
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if (RegNo > 3)
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return MCDisassembler::Fail;
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unsigned Register = PredRegDecoderTable[RegNo];
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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#include "HexagonGenDisassemblerTables.inc"
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static MCDisassembler *createHexagonDisassembler(Target const &T,
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MCSubtargetInfo const &STI,
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MCContext &Ctx) {
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return new HexagonDisassembler(STI, Ctx);
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}
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extern "C" void LLVMInitializeHexagonDisassembler() {
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TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
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createHexagonDisassembler);
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}
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DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
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ArrayRef<uint8_t> Bytes,
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uint64_t Address,
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raw_ostream &os,
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raw_ostream &cs) const {
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DecodeStatus Result = DecodeStatus::Success;
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bool Complete = false;
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Size = 0;
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*CurrentBundle = &MI;
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MI.setOpcode(Hexagon::BUNDLE);
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MI.addOperand(MCOperand::createImm(0));
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while (Result == Success && Complete == false)
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{
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if (Bytes.size() < HEXAGON_INSTR_SIZE)
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return MCDisassembler::Fail;
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MCInst * Inst = new (getContext()) MCInst;
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Result = getSingleInstruction(*Inst, MI, Bytes, Address, os, cs, Complete);
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MI.addOperand(MCOperand::createInst(Inst));
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Size += HEXAGON_INSTR_SIZE;
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Bytes = Bytes.slice(HEXAGON_INSTR_SIZE);
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}
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return Result;
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}
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DecodeStatus HexagonDisassembler::getSingleInstruction(
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MCInst &MI, MCInst &MCB, ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &os, raw_ostream &cs, bool &Complete) const {
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assert(Bytes.size() >= HEXAGON_INSTR_SIZE);
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uint32_t Instruction =
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llvm::support::endian::read<uint32_t, llvm::support::little,
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llvm::support::unaligned>(Bytes.data());
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auto BundleSize = HexagonMCInstrInfo::bundleSize(MCB);
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if ((Instruction & HexagonII::INST_PARSE_MASK) ==
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HexagonII::INST_PARSE_LOOP_END) {
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if (BundleSize == 0)
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HexagonMCInstrInfo::setInnerLoop(MCB);
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else if (BundleSize == 1)
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HexagonMCInstrInfo::setOuterLoop(MCB);
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else
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return DecodeStatus::Fail;
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}
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DecodeStatus Result = DecodeStatus::Success;
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if ((Instruction & HexagonII::INST_PARSE_MASK) ==
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HexagonII::INST_PARSE_PACKET_END)
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Complete = true;
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// Calling the auto-generated decoder function.
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Result =
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decodeInstruction(DecoderTable32, MI, Instruction, Address, this, STI);
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return Result;
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}
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