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38aad1c16a
The src and dst register cannot be the same on chips with 16 lds banks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238147 91177308-0d34-0410-b5e6-96231b3b80d8
138 lines
4.8 KiB
TableGen
138 lines
4.8 KiB
TableGen
//===-- Processors.td - R600 Processor definitions ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>
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: Processor<Name, itin, Features>;
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//===----------------------------------------------------------------------===//
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// R600
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//===----------------------------------------------------------------------===//
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def : Proc<"", R600_VLIW5_Itin,
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[FeatureR600, FeatureVertexCache]>;
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def : Proc<"r600", R600_VLIW5_Itin,
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[FeatureR600 , FeatureVertexCache, FeatureWavefrontSize64]>;
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def : Proc<"r630", R600_VLIW5_Itin,
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[FeatureR600, FeatureVertexCache, FeatureWavefrontSize32]>;
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def : Proc<"rs880", R600_VLIW5_Itin,
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[FeatureR600, FeatureWavefrontSize16]>;
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def : Proc<"rv670", R600_VLIW5_Itin,
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[FeatureR600, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
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//===----------------------------------------------------------------------===//
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// R700
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//===----------------------------------------------------------------------===//
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def : Proc<"rv710", R600_VLIW5_Itin,
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[FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
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def : Proc<"rv730", R600_VLIW5_Itin,
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[FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
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def : Proc<"rv770", R600_VLIW5_Itin,
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[FeatureR700, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
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//===----------------------------------------------------------------------===//
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// Evergreen
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//===----------------------------------------------------------------------===//
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def : Proc<"cedar", R600_VLIW5_Itin,
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[FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32,
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FeatureCFALUBug]>;
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def : Proc<"redwood", R600_VLIW5_Itin,
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[FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64,
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FeatureCFALUBug]>;
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def : Proc<"sumo", R600_VLIW5_Itin,
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[FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>;
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def : Proc<"juniper", R600_VLIW5_Itin,
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[FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>;
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def : Proc<"cypress", R600_VLIW5_Itin,
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[FeatureEvergreen, FeatureFP64, FeatureVertexCache,
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FeatureWavefrontSize64]>;
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//===----------------------------------------------------------------------===//
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// Northern Islands
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//===----------------------------------------------------------------------===//
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def : Proc<"barts", R600_VLIW5_Itin,
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[FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
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def : Proc<"turks", R600_VLIW5_Itin,
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[FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
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def : Proc<"caicos", R600_VLIW5_Itin,
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[FeatureNorthernIslands, FeatureCFALUBug]>;
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def : Proc<"cayman", R600_VLIW4_Itin,
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[FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;
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//===----------------------------------------------------------------------===//
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// Southern Islands
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//===----------------------------------------------------------------------===//
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def : ProcessorModel<"SI", SIFullSpeedModel,
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[FeatureSouthernIslands, FeatureFastFMAF32]
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>;
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def : ProcessorModel<"tahiti", SIFullSpeedModel,
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[FeatureSouthernIslands, FeatureFastFMAF32]
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>;
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def : ProcessorModel<"pitcairn", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
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def : ProcessorModel<"verde", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
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def : ProcessorModel<"oland", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
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def : ProcessorModel<"hainan", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
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//===----------------------------------------------------------------------===//
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// Sea Islands
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//===----------------------------------------------------------------------===//
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def : ProcessorModel<"bonaire", SIQuarterSpeedModel,
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[FeatureSeaIslands, FeatureLDSBankCount32]
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>;
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def : ProcessorModel<"kabini", SIQuarterSpeedModel,
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[FeatureSeaIslands, FeatureLDSBankCount16]
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>;
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def : ProcessorModel<"kaveri", SIQuarterSpeedModel,
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[FeatureSeaIslands, FeatureLDSBankCount32]
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>;
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def : ProcessorModel<"hawaii", SIFullSpeedModel,
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[FeatureSeaIslands, FeatureFastFMAF32, FeatureLDSBankCount32]
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>;
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def : ProcessorModel<"mullins", SIQuarterSpeedModel,
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[FeatureSeaIslands, FeatureLDSBankCount16]>;
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//===----------------------------------------------------------------------===//
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// Volcanic Islands
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//===----------------------------------------------------------------------===//
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def : ProcessorModel<"tonga", SIQuarterSpeedModel,
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[FeatureVolcanicIslands, FeatureSGPRInitBug]
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>;
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def : ProcessorModel<"iceland", SIQuarterSpeedModel,
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[FeatureVolcanicIslands, FeatureSGPRInitBug]
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>;
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def : ProcessorModel<"carrizo", SIQuarterSpeedModel, [FeatureVolcanicIslands]>;
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