llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-21 21:29:41 +00:00

History

Tom Stellard aa6ec15caf R600/SI: Implement spilling of SGPRs v5

SGPRs are spilled into VGPRs using the {READ,WRITE}LANE_B32 instructions.

v2:
  - Fix encoding of Lane Mask
  - Use correct register flags, so we don't overwrite the low dword
    when restoring multi-dword registers.

v3:
  - Register spilling seems to hang the GPU, so replace all shaders
    that need spilling with a dummy shader.

v4:
  - Fix *LANE definitions
  - Change destination reg class for 32-bit SMRD instructions

v5:
  - Remove small optimization that was crashing Serious Sam 3.

https://bugs.freedesktop.org/show_bug.cgi?id=68224
https://bugs.freedesktop.org/show_bug.cgi?id=71285

NOTE: This is a candidate for the 3.4 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195880 91177308-0d34-0410-b5e6-96231b3b80d8

2013-11-27 21:23:35 +00:00

AArch64

Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics.

2013-11-27 14:02:25 +00:00

ARM

Darwin-ARM: use movw/movt for static relocations

2013-11-26 12:45:05 +00:00

CPP

…

Generic

Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions."

2013-11-21 10:55:15 +00:00