Vincent Lejeune abfd5f6154 R600: Fold zero/one in export instructions ...

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175181 91177308-0d34-0410-b5e6-96231b3b80d8

2013-02-14 16:55:06 +00:00

..

InstPrinter

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

MCTargetDesc

R600: Add support for 128-bit parameters

2013-02-13 22:05:20 +00:00

TargetInfo

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AMDGPU.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPU.td

…

AMDGPUAsmPrinter.cpp

R600/SI: cleanup VGPR encoding

2013-02-07 19:39:45 +00:00

AMDGPUAsmPrinter.h

…

AMDGPUCodeEmitter.h

R600/SI: simplify and fix SMRD encoding

2013-02-07 19:39:40 +00:00

AMDGPUConvertToISA.cpp

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AMDGPUFrameLowering.cpp

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUFrameLowering.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUIndirectAddressing.cpp

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUInstrInfo.cpp

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUInstrInfo.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUInstrInfo.td

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUInstructions.td

R600/SI: Add basic support for more integer vector types.

2013-02-07 17:02:09 +00:00

AMDGPUIntrinsics.td

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AMDGPUISelLowering.cpp

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUISelLowering.h

R600: Dump the function name when TargetLowering::LowerCall() fails

2013-02-08 22:24:40 +00:00

AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPURegisterInfo.cpp

R600: Consolidate sub register indices.

2013-02-07 14:02:37 +00:00

AMDGPURegisterInfo.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPURegisterInfo.td

R600: Consolidate sub register indices.

2013-02-07 14:02:37 +00:00

AMDGPUStructurizeCFG.cpp

R600: rework flow creation in the structurizer v2

2013-02-08 22:24:38 +00:00

AMDGPUSubtarget.cpp

…

AMDGPUSubtarget.h

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AMDGPUTargetMachine.cpp

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDGPUTargetMachine.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

AMDIL7XXDevice.cpp

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AMDIL7XXDevice.h

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AMDIL.h

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AMDILBase.td

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AMDILCFGStructurizer.cpp

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AMDILDevice.cpp

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AMDILDevice.h

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AMDILDeviceInfo.cpp

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AMDILDeviceInfo.h

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AMDILDevices.h

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AMDILEvergreenDevice.cpp

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AMDILEvergreenDevice.h

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AMDILInstrInfo.td

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AMDILIntrinsicInfo.cpp

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AMDILIntrinsicInfo.h

…

AMDILIntrinsics.td

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AMDILISelDAGToDAG.cpp

R600: Do not fold modifier/litterals in vector inst

2013-02-14 16:55:01 +00:00

AMDILISelLowering.cpp

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AMDILNIDevice.cpp

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AMDILNIDevice.h

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AMDILPeepholeOptimizer.cpp

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AMDILRegisterInfo.td

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AMDILSIDevice.cpp

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AMDILSIDevice.h

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CMakeLists.txt

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

LLVMBuild.txt

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Makefile

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Processors.td

R600: Add an explicit default processor

2013-02-07 19:39:34 +00:00

R600Defines.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

R600ExpandSpecialInstrs.cpp

R600: improve inputs/interpolation handling

2013-02-05 17:09:14 +00:00

R600InstrInfo.cpp

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

R600InstrInfo.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

R600Instructions.td

R600: Fold zero/one in export instructions

2013-02-14 16:55:06 +00:00

R600Intrinsics.td

R600: Fold zero/one in export instructions

2013-02-14 16:55:06 +00:00

R600ISelLowering.cpp

R600: Fold zero/one in export instructions

2013-02-14 16:55:06 +00:00

R600ISelLowering.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

R600LowerConstCopy.cpp

R600: Fold remaining CONST_COPY after expand pseudo inst

2013-02-05 17:09:16 +00:00

R600MachineFunctionInfo.cpp

R600: improve inputs/interpolation handling

2013-02-05 17:09:14 +00:00

R600MachineFunctionInfo.h

R600: Support for indirect addressing v4

2013-02-06 17:32:29 +00:00

R600RegisterInfo.cpp

R600: Consolidate sub register indices.

2013-02-07 14:02:37 +00:00

R600RegisterInfo.h

…

R600RegisterInfo.td

R600: Consolidate sub register indices.

2013-02-07 14:02:37 +00:00

R600Schedule.td

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SIAnnotateControlFlow.cpp

R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack

2013-02-14 08:00:33 +00:00

SIAssignInterpRegs.cpp

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SIInsertWaits.cpp

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SIInstrFormats.td

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SIInstrInfo.cpp

R600/SI: Handle VGPR64 destination in copyPhysReg().

2013-02-07 19:39:43 +00:00

SIInstrInfo.h

R600/SI: cleanup VGPR encoding

2013-02-07 19:39:45 +00:00

SIInstrInfo.td

R600/SI: cleanup VGPR encoding

2013-02-07 19:39:45 +00:00

SIInstructions.td

R600/SI: Add pattern for mul.

2013-02-07 19:39:42 +00:00

SIIntrinsics.td

R600/SI: Make sample intrinsic address parameter type overloaded.

2013-02-07 17:02:13 +00:00

SIISelLowering.cpp

R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.

2013-02-11 15:58:21 +00:00

SIISelLowering.h

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SILowerControlFlow.cpp

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SILowerLiteralConstants.cpp

R600/SI: add proper 64bit immediate support v2

2013-02-07 19:39:38 +00:00

SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIRegisterInfo.cpp

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SIRegisterInfo.h

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SIRegisterInfo.td

R600/SI: cleanup VGPR encoding

2013-02-07 19:39:45 +00:00

SISchedule.td

…