Akira Hatanaka ad5f0c9e73 Change default target architecture from Mips1 to Mips32r1 in preparation for ...

removing support for Mips1 and Mips2. 

This change and the ones that follow have been discussed with and approved by
Bruno.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8

2011-09-09 01:13:27 +00:00

..

Analysis

A couple minor corrections to r139276.

2011-09-08 02:37:07 +00:00

Archive

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AsmParser

Auto upgrade the old EH scheme to use the new one. This is on a trial basis. If

2011-08-27 06:11:03 +00:00

Bitcode

Don't forget to add the landingpad and resume instructions to the InstructionList.

2011-09-01 00:50:20 +00:00

CodeGen

Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.

2011-09-08 22:59:09 +00:00

CompilerDriver

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ExecutionEngine

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Linker

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MC

Formatting and typo.

2011-09-08 22:17:40 +00:00

Object

Remove dead code.

2011-09-09 00:22:05 +00:00

Support

Add AMDIL as valid target triple to LLVM.

2011-08-29 15:44:55 +00:00

Target

Change default target architecture from Mips1 to Mips32r1 in preparation for

2011-09-09 01:13:27 +00:00

Transforms

Add -verify-indvars for imperfect SCEV trip count verification after indvars.

2011-09-06 20:20:38 +00:00

VMCore

Add codegen support for vector select (in the IR this means a select

2011-09-06 19:07:46 +00:00

CMakeLists.txt

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Makefile

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