Andrew Trick ad626132a9 Reenable, improve, and add MI-Sched unit tests. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184134 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-17 21:45:16 +00:00

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AArch64

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ARM

Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.

2013-06-17 19:00:36 +00:00

CPP

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Generic

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Hexagon

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Inputs

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MBlaze

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Mips

[mips] Add an IR transformation pass that optimizes calls to sqrt.

2013-06-11 22:21:44 +00:00

MSP430

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NVPTX

[NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space

2013-06-10 13:29:47 +00:00

PowerPC

[PowerPC] Disable fast-isel for existing -O0 tests for PowerPC.

2013-06-13 20:23:34 +00:00

R600

R600: PV stores Reg id, not index

2013-06-17 20:16:40 +00:00

SI

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SPARC

Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.

2013-06-17 19:00:36 +00:00

SystemZ

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Thumb

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Thumb2

Cortex-R5 can issue Thumb2 integer division instructions.

2013-06-04 22:52:09 +00:00

X86

Reenable, improve, and add MI-Sched unit tests.

2013-06-17 21:45:16 +00:00

XCore

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