Bruno Cardoso Lopes ad6eef4a65 This patch handles unaligned loads and stores in Mips JIT. Mips backend ... implements unaligned loads and stores with assembler macro-instructions ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions instead of these macros. Since each unaligned load/store is expanded into two corresponding loads/stores where offset for second load/store is modified by +3 (for words) or +1 (for halfwords). Patch by Petar Jovanovic and Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144081 91177308-0d34-0410-b5e6-96231b3b80d8		2011-11-08 12:47:11 +00:00
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Analysis	Teach instsimplify to simplify calls to undef.	2011-11-04 18:32:42 +00:00
Archive
AsmParser
Bitcode
CodeGen	Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.	2011-11-08 01:25:24 +00:00
DebugInfo	Audited all the format strings in libDebugInfo and fixed those that didn't match the types.	2011-11-05 16:01:13 +00:00
ExecutionEngine
Linker
MC	Simplify some uses of utohexstr.	2011-11-07 21:00:59 +00:00
Object	MachOObject: Use DataExtractor's uleb parser instead of rolling our own.	2011-11-05 12:13:21 +00:00
Support	Fix a typo.	2011-11-06 20:36:50 +00:00
TableGen
Target	This patch handles unaligned loads and stores in Mips JIT. Mips backend	2011-11-08 12:47:11 +00:00
Transforms	InstCombine now optimizes vector udiv by power of 2 to shifts	2011-11-07 23:04:49 +00:00
VMCore
CMakeLists.txt
LLVMBuild.txt
Makefile