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	Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			110 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			110 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===-- RegAllocBase.h - basic regalloc interface and driver --*- C++ -*---===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This file defines the RegAllocBase class, which is the skeleton of a basic
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| // register allocation algorithm and interface for extending it. It provides the
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| // building blocks on which to construct other experimental allocators and test
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| // the validity of two principles:
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| //
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| // - If virtual and physical register liveness is modeled using intervals, then
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| // on-the-fly interference checking is cheap. Furthermore, interferences can be
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| // lazily cached and reused.
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| //
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| // - Register allocation complexity, and generated code performance is
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| // determined by the effectiveness of live range splitting rather than optimal
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| // coloring.
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| //
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| // Following the first principle, interfering checking revolves around the
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| // LiveIntervalUnion data structure.
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| //
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| // To fulfill the second principle, the basic allocator provides a driver for
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| // incremental splitting. It essentially punts on the problem of register
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| // coloring, instead driving the assignment of virtual to physical registers by
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| // the cost of splitting. The basic allocator allows for heuristic reassignment
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| // of registers, if a more sophisticated allocator chooses to do that.
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| //
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| // This framework provides a way to engineer the compile time vs. code
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| // quality trade-off without relying on a particular theoretical solver.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #ifndef LLVM_LIB_CODEGEN_REGALLOCBASE_H
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| #define LLVM_LIB_CODEGEN_REGALLOCBASE_H
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| 
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| #include "llvm/CodeGen/LiveInterval.h"
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| #include "llvm/CodeGen/RegisterClassInfo.h"
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| 
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| namespace llvm {
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| 
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| template<typename T> class SmallVectorImpl;
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| class TargetRegisterInfo;
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| class VirtRegMap;
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| class LiveIntervals;
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| class LiveRegMatrix;
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| class Spiller;
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| 
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| /// RegAllocBase provides the register allocation driver and interface that can
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| /// be extended to add interesting heuristics.
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| ///
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| /// Register allocators must override the selectOrSplit() method to implement
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| /// live range splitting. They must also override enqueue/dequeue to provide an
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| /// assignment order.
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| class RegAllocBase {
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|   virtual void anchor();
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| protected:
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|   const TargetRegisterInfo *TRI;
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|   MachineRegisterInfo *MRI;
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|   VirtRegMap *VRM;
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|   LiveIntervals *LIS;
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|   LiveRegMatrix *Matrix;
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|   RegisterClassInfo RegClassInfo;
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| 
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|   RegAllocBase()
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|     : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
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| 
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|   virtual ~RegAllocBase() {}
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| 
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|   // A RegAlloc pass should call this before allocatePhysRegs.
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|   void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
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| 
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|   // The top-level driver. The output is a VirtRegMap that us updated with
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|   // physical register assignments.
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|   void allocatePhysRegs();
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| 
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|   // Get a temporary reference to a Spiller instance.
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|   virtual Spiller &spiller() = 0;
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| 
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|   /// enqueue - Add VirtReg to the priority queue of unassigned registers.
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|   virtual void enqueue(LiveInterval *LI) = 0;
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| 
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|   /// dequeue - Return the next unassigned register, or NULL.
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|   virtual LiveInterval *dequeue() = 0;
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| 
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|   // A RegAlloc pass should override this to provide the allocation heuristics.
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|   // Each call must guarantee forward progess by returning an available PhysReg
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|   // or new set of split live virtual registers. It is up to the splitter to
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|   // converge quickly toward fully spilled live ranges.
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|   virtual unsigned selectOrSplit(LiveInterval &VirtReg,
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|                                  SmallVectorImpl<unsigned> &splitLVRs) = 0;
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| 
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|   // Use this group name for NamedRegionTimer.
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|   static const char TimerGroupName[];
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| 
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| public:
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|   /// VerifyEnabled - True when -verify-regalloc is given.
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|   static bool VerifyEnabled;
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| 
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| private:
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|   void seedLiveRegs();
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| };
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| 
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| } // end namespace llvm
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| 
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| #endif
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