Juergen Ributzka ae9a7964ef [FastISel][AArch64] Factor out ADDS/SUBS instruction emission and add support for extensions and shift folding. ...

Factor out the ADDS/SUBS instruction emission code into helper functions and
make the helper functions more clever to support most of the different ADDS/SUBS
instructions the architecture support. This includes better immedediate support,
shift folding, and sign-/zero-extend folding.

This fixes <rdar://problem/17913111>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216033 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-19 22:29:55 +00:00

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Analysis

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AsmParser

Split parseAssembly into parseAssembly and parseAssemblyInto.

2014-08-19 22:05:47 +00:00

Bitcode

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CodeGen

Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588).

2014-08-19 19:05:24 +00:00

DebugInfo

Don't own the buffer in object::Binary.

2014-08-19 18:44:46 +00:00

ExecutionEngine

[MCJIT] Allow '$' characters in symbol names in RuntimeDyldChecker.

2014-08-19 20:04:45 +00:00

IR

IR: Implement uselistorder assembly directives

2014-08-19 21:30:15 +00:00

IRReader

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LineEditor

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Linker

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LTO

Don't own the buffer in object::Binary.

2014-08-19 18:44:46 +00:00

MC

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Object

Fix a pair of use after free. Should bring the bots back.

2014-08-19 18:59:14 +00:00

Option

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ProfileData

Don't own the buffer in object::Binary.

2014-08-19 18:44:46 +00:00

Support

Don't own the buffer in object::Binary.

2014-08-19 18:44:46 +00:00

TableGen

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Target

[FastISel][AArch64] Factor out ADDS/SUBS instruction emission and add support for extensions and shift folding.

2014-08-19 22:29:55 +00:00

Transforms

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CMakeLists.txt

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LLVMBuild.txt

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Makefile

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