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llvm-6502/lib/Target/PowerPC
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Nate Begeman af4ab1b103 Optimize FSEL a bit for fneg arguments. This fixes the recently added test 
case so that we emit

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fsel f1, f1, f3, f2
        blr

instead of:

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fneg f0, f1
        fneg f0, f0
        fsel f1, f0, f3, f2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21177 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 09:33:07 +00:00
..
.cvsignore
ignore generated files.
2004-11-21 00:00:54 +00:00
LICENSE.TXT
Added Louis Gerbarg. Louis is given credit in the CREDITS.TXT file, so I
2004-08-05 23:46:27 +00:00
Makefile
Specify all of the targets built.
2004-12-16 17:26:44 +00:00
PowerPC.td
Factor out common .td file chunks.
2004-12-16 16:31:57 +00:00
PowerPCInstrInfo.h
Get rid of flags that are dead
2004-11-23 20:37:41 +00:00
PowerPCTargetMachine.h
Remove the ISel->AsmPrinter link via the TargetMachine that was put in
2004-11-27 04:45:11 +00:00
PPC32.td
Factor out common .td file chunks.
2004-12-16 16:31:57 +00:00
PPC32ISelSimple.cpp
Fix some shift bugs
2005-04-06 22:42:08 +00:00
PPC32JITInfo.h
Implement all of the methods
2004-11-23 05:57:57 +00:00
PPC32RegisterInfo.td
Switch from bytes to bits for alignment.
2004-08-21 20:14:40 +00:00
PPC64.td
Factor out common .td file chunks.
2004-12-16 16:31:57 +00:00
PPC64CodeEmitter.cpp
getJITStubForFunction is optional and unimplemented, just remove it.
2004-11-20 04:14:44 +00:00
PPC64InstrInfo.cpp
PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC
2004-08-17 04:57:37 +00:00
PPC64InstrInfo.h
PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC
2004-08-17 04:57:37 +00:00
PPC64ISelPattern.cpp
This target does not yet support ISD::BRCONDTWOWAY
2005-04-09 03:22:30 +00:00
PPC64JITInfo.h
getJITStubForFunction is optional and unimplemented, just remove it.
2004-11-20 04:14:44 +00:00
PPC64RegisterInfo.cpp
Eliminate usage of MRegisterInfo::getRegClass(physreg)
2004-10-26 05:40:45 +00:00
PPC64RegisterInfo.h
PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC
2004-08-17 04:57:37 +00:00
PPC64RegisterInfo.td
Switch from bytes to bits for alignment.
2004-08-21 20:14:40 +00:00
PPC64TargetMachine.h
PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC
2004-08-17 04:57:37 +00:00
PPC.h
Remove 64 bit simple ISel, it never worked correctly
2005-04-05 08:51:15 +00:00
PPCAsmPrinter.cpp
Behold, rlwinm with certain immediate arguments is printed as the much more
2005-04-05 18:19:50 +00:00
PPCBranchSelector.cpp
Remove unnecessary header include
2004-10-07 22:24:32 +00:00
PPCCodeEmitter.cpp
Enable optimization suggested by Chris Lattner to not emit reloc stubs for
2004-11-25 07:09:01 +00:00
PPCFrameInfo.h
Remove file that is no longer used, and move include of MRegisterInfo.h
2004-10-26 06:02:38 +00:00
PPCInstrBuilder.h
* Wrap long lines (comments and code)
2004-07-07 20:01:36 +00:00
PPCInstrFormats.td
Fix encoding of fsel, fixing olden/power, McCat/bisort and several others.
2004-11-25 04:11:07 +00:00
PPCInstrInfo.cpp
Add ori reg, reg, 0 as a move instruction. This can be generated from
2004-10-07 22:26:12 +00:00
PPCInstrInfo.h
PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
2004-08-17 04:55:41 +00:00
PPCInstrInfo.td
Add support for MULHS and MULHU nodes
2005-04-06 00:25:27 +00:00
PPCISelPattern.cpp
Optimize FSEL a bit for fneg arguments. This fixes the recently added test
2005-04-09 09:33:07 +00:00
PPCJITInfo.cpp
There is no reason to store <x,x>, just store <x>.
2004-11-26 20:25:17 +00:00
PPCJITInfo.h
This method is dead
2004-11-23 18:47:55 +00:00
PPCRegisterInfo.cpp
Remove unnecessary register copy now that regalloc is fixed
2005-04-04 21:48:13 +00:00
PPCRegisterInfo.h
PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
2004-08-17 04:55:41 +00:00
PPCRegisterInfo.td
Revamp the Register class, and allow the use of the RegisterGroup class to
2004-09-14 04:17:02 +00:00
PPCRelocations.h
* Rename existing relocations to be more specific
2004-11-24 22:30:08 +00:00
PPCTargetMachine.cpp
Remove 64 bit simple ISel, it never worked correctly
2005-04-05 08:51:15 +00:00
PPCTargetMachine.h
Move JITInfo from PPCTM to PPC32TM
2004-11-23 05:56:40 +00:00
README.txt
Put int the getReg cast optimization from x86 so that we generate fewer
2004-11-08 02:25:40 +00:00

README.txt 

TODO:
* poor switch statement codegen
* load/store to alloca'd array or struct.
* implement not-R0 register GPR class
* implement scheduling info
* implement do-loop pass
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation