Vikram S. Adve b5161b60c2 All constant-evaluation code now unified into ...

TargetInstrInfo::ConvertConstantToIntType().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7390 91177308-0d34-0410-b5e6-96231b3b80d8

2003-07-29 19:50:12 +00:00

..

InstrSched

Be const correct

2003-07-26 23:23:41 +00:00

InstrSelection

All constant-evaluation code now unified into

2003-07-29 19:50:12 +00:00

Mapping

Moved FInfo.cpp to lib/Target/Sparc as it is Sparc-specific.

2003-06-02 23:27:09 +00:00

ModuloScheduling

Remove #include

2003-07-26 23:01:04 +00:00

PostOpts

Peephole optimization pass on final machine code.

2002-09-20 00:42:11 +00:00

PreOpts

Moving these files from Code/PreSelection to here.

2002-09-20 00:29:28 +00:00

RegAlloc

1. Bug fix: Don't use branch operand reg. as temp. reg. when

2003-07-29 19:49:21 +00:00

LiveVariables.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

MachineCodeEmitter.cpp

Pass through the emitConstantPool() call to the real emitter.

2003-06-03 20:00:49 +00:00

MachineCodeForInstruction.cpp

Move CallArgsDescriptor into this class instead of making it an

2002-10-29 19:38:46 +00:00

MachineFunction.cpp

Const correctness fixes

2003-07-26 23:24:56 +00:00

MachineInstr.cpp

Change interface to MachineInstr::substituteValue to specify more precisely

2003-07-10 19:45:07 +00:00

MachineInstrAnnot.cpp

Values stored in CallArgsDescriptor cannot be const.

2003-07-10 19:46:15 +00:00

Makefile

Initial checkin of codegen infrastructure for LLVM-JIT

2002-10-25 22:54:41 +00:00

PHIElimination.cpp

Const correctness fixes

2003-07-26 23:24:56 +00:00

PrologEpilogInserter.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

RegAllocLocal.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

RegAllocSimple.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00