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	Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			83 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			83 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //=-- Hexagon.h - Top-level interface for Hexagon representation --*- C++ -*-=//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This file contains the entry points for global functions defined in the LLVM
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| // Hexagon back-end.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGON_H
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| #define LLVM_LIB_TARGET_HEXAGON_HEXAGON_H
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| 
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| #include "MCTargetDesc/HexagonMCTargetDesc.h"
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| #include "llvm/Target/TargetLowering.h"
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| #include "llvm/Target/TargetMachine.h"
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| 
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| namespace llvm {
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|   class FunctionPass;
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|   class ModulePass;
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|   class TargetMachine;
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|   class MachineInstr;
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|   class HexagonMCInst;
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|   class HexagonAsmPrinter;
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|   class HexagonTargetMachine;
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|   class raw_ostream;
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| 
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|   FunctionPass *createHexagonISelDag(HexagonTargetMachine &TM,
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|                                      CodeGenOpt::Level OptLevel);
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|   FunctionPass *createHexagonDelaySlotFillerPass(const TargetMachine &TM);
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|   FunctionPass *createHexagonFPMoverPass(const TargetMachine &TM);
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|   FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM);
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|   FunctionPass *createHexagonCFGOptimizer(const HexagonTargetMachine &TM);
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| 
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|   FunctionPass *createHexagonSplitTFRCondSets(const HexagonTargetMachine &TM);
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|   FunctionPass *createHexagonSplitConst32AndConst64(
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|                       const HexagonTargetMachine &TM);
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|   FunctionPass *createHexagonExpandPredSpillCode(
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|                       const HexagonTargetMachine &TM);
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|   FunctionPass *createHexagonHardwareLoops();
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|   FunctionPass *createHexagonPeephole();
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|   FunctionPass *createHexagonFixupHwLoops();
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|   FunctionPass *createHexagonNewValueJump();
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|   FunctionPass *createHexagonCopyToCombine();
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|   FunctionPass *createHexagonPacketizer();
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|   FunctionPass *createHexagonNewValueJump();
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| 
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| /* TODO: object output.
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|   MCCodeEmitter *createHexagonMCCodeEmitter(const Target &,
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|                                             const TargetMachine &TM,
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|                                             MCContext &Ctx);
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| */
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| /* TODO: assembler input.
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|   TargetAsmBackend *createHexagonAsmBackend(const Target &,
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|                                                   const std::string &);
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| */
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|   void HexagonLowerToMC(const MachineInstr *MI, HexagonMCInst &MCI,
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|                         HexagonAsmPrinter &AP);
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| } // end namespace llvm;
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| 
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| #define Hexagon_POINTER_SIZE 4
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| 
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| #define Hexagon_PointerSize (Hexagon_POINTER_SIZE)
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| #define Hexagon_PointerSize_Bits (Hexagon_POINTER_SIZE * 8)
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| #define Hexagon_WordSize Hexagon_PointerSize
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| #define Hexagon_WordSize_Bits Hexagon_PointerSize_Bits
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| 
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| // allocframe saves LR and FP on stack before allocating
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| // a new stack frame. This takes 8 bytes.
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| #define HEXAGON_LRFP_SIZE 8
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| 
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| // Normal instruction size (in bytes).
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| #define HEXAGON_INSTR_SIZE 4
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| 
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| // Maximum number of words and instructions in a packet.
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| #define HEXAGON_PACKET_SIZE 4
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| 
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| #endif
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