Dan Gohman b1e8cad61e Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation,
which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 22:18:25 +00:00
..
2008-07-08 16:40:43 +00:00
2008-07-27 21:46:04 +00:00
2008-07-27 21:46:04 +00:00