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aa5b9c0f6f
be deleted. This will be reapplied as soon as possible and before the 3.6 branch date at any rate. Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reverts commits r215111, 215115, 215116, 215117, 215136. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.2 KiB
C++
69 lines
2.2 KiB
C++
//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Sparc specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARCTARGETMACHINE_H
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#define SPARCTARGETMACHINE_H
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#include "SparcInstrInfo.h"
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#include "SparcSubtarget.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class SparcTargetMachine : public LLVMTargetMachine {
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SparcSubtarget Subtarget;
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public:
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SparcTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL, bool is64bit);
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const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }
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SparcSubtarget *getSubtargetImpl() {
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return static_cast<SparcSubtarget *>(TargetMachine::getSubtargetImpl());
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}
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
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};
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/// SparcV8TargetMachine - Sparc 32-bit target machine
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///
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class SparcV8TargetMachine : public SparcTargetMachine {
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virtual void anchor();
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public:
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SparcV8TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// SparcV9TargetMachine - Sparc 64-bit target machine
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///
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class SparcV9TargetMachine : public SparcTargetMachine {
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virtual void anchor();
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public:
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SparcV9TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // end namespace llvm
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#endif
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