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https://github.com/c64scene-ar/llvm-6502.git
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111e7629cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90432 91177308-0d34-0410-b5e6-96231b3b80d8
383 lines
14 KiB
C++
383 lines
14 KiB
C++
//===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass duplicates basic blocks ending in unconditional branches into
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// the tails of their predecessors.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "tailduplication"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineSSAUpdater.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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STATISTIC(NumTailDups , "Number of tail duplicated blocks");
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STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
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STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
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// Heuristic for tail duplication.
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static cl::opt<unsigned>
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TailDuplicateSize("tail-dup-size",
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cl::desc("Maximum instructions to consider tail duplicating"),
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cl::init(2), cl::Hidden);
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typedef std::vector<unsigned> AvailableValsTy;
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namespace {
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/// TailDuplicatePass - Perform tail duplication.
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class TailDuplicatePass : public MachineFunctionPass {
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const TargetInstrInfo *TII;
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MachineModuleInfo *MMI;
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MachineRegisterInfo *MRI;
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// SSAUpdateVRs - A list of virtual registers for which to update SSA form.
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SmallVector<unsigned, 16> SSAUpdateVRs;
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// SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
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// source virtual registers.
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DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
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public:
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static char ID;
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explicit TailDuplicatePass() : MachineFunctionPass(&ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const { return "Tail Duplication"; }
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private:
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void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg);
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bool TailDuplicateBlocks(MachineFunction &MF);
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bool TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF);
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void RemoveDeadBlock(MachineBasicBlock *MBB);
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};
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char TailDuplicatePass::ID = 0;
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}
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FunctionPass *llvm::createTailDuplicatePass() {
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return new TailDuplicatePass();
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}
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bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getTarget().getInstrInfo();
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MRI = &MF.getRegInfo();
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MMI = getAnalysisIfAvailable<MachineModuleInfo>();
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bool MadeChange = false;
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bool MadeChangeThisIteration = true;
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while (MadeChangeThisIteration) {
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MadeChangeThisIteration = false;
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MadeChangeThisIteration |= TailDuplicateBlocks(MF);
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MadeChange |= MadeChangeThisIteration;
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}
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return MadeChange;
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}
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/// TailDuplicateBlocks - Look for small blocks that are unconditionally
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/// branched to and do not fall through. Tail-duplicate their instructions
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/// into their predecessors to eliminate (dynamic) branches.
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bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
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bool MadeChange = false;
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SSAUpdateVRs.clear();
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SSAUpdateVals.clear();
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for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
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MachineBasicBlock *MBB = I++;
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// Only duplicate blocks that end with unconditional branches.
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if (MBB->canFallThrough())
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continue;
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MadeChange |= TailDuplicate(MBB, MF);
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// If it is dead, remove it.
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if (MBB->pred_empty()) {
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NumInstrDups -= MBB->size();
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RemoveDeadBlock(MBB);
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MadeChange = true;
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++NumDeadBlocks;
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}
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}
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if (!SSAUpdateVRs.empty()) {
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// Update SSA form.
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MachineSSAUpdater SSAUpdate(MF);
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for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
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unsigned VReg = SSAUpdateVRs[i];
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SSAUpdate.Initialize(VReg);
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// If the original definition is still around, add it as an available
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// value.
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MachineInstr *DefMI = MRI->getVRegDef(VReg);
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MachineBasicBlock *DefBB = 0;
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if (DefMI) {
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DefBB = DefMI->getParent();
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SSAUpdate.AddAvailableValue(DefBB, VReg);
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}
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// Add the new vregs as available values.
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DenseMap<unsigned, AvailableValsTy>::iterator LI =
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SSAUpdateVals.find(VReg);
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for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
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unsigned NewReg = LI->second[j];
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MachineInstr *DefMI = MRI->getVRegDef(NewReg);
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SSAUpdate.AddAvailableValue(DefMI->getParent(), NewReg);
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}
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// Rewrite uses that are outside of the original def's block.
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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MachineInstr *UseMI = &*UI;
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if (UseMI->getParent() != DefBB)
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SSAUpdate.RewriteUse(UI.getOperand());
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}
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}
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}
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return MadeChange;
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}
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static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
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const MachineRegisterInfo *MRI) {
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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MachineInstr *UseMI = &*UI;
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if (UseMI->getParent() != BB)
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return true;
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}
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return false;
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}
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static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
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for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
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if (MI->getOperand(i+1).getMBB() == SrcBB)
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return i;
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return 0;
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}
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/// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
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/// SSA update.
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void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg) {
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DenseMap<unsigned, AvailableValsTy>::iterator LI =
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SSAUpdateVals.find(OrigReg);
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if (LI != SSAUpdateVals.end())
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LI->second.push_back(NewReg);
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else {
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AvailableValsTy Vals;
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Vals.push_back(NewReg);
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SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
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SSAUpdateVRs.push_back(OrigReg);
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}
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}
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/// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
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/// of its predecessors.
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bool TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB,
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MachineFunction &MF) {
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// Don't try to tail-duplicate single-block loops.
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if (TailBB->isSuccessor(TailBB))
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return false;
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// Set the limit on the number of instructions to duplicate, with a default
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// of one less than the tail-merge threshold. When optimizing for size,
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// duplicate only one, because one branch instruction can be eliminated to
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// compensate for the duplication.
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unsigned MaxDuplicateCount;
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if (!TailBB->empty() && TailBB->back().getDesc().isIndirectBranch())
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// If the target has hardware branch prediction that can handle indirect
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// branches, duplicating them can often make them predictable when there
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// are common paths through the code. The limit needs to be high enough
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// to allow undoing the effects of tail merging.
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MaxDuplicateCount = 20;
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else if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
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MaxDuplicateCount = 1;
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else
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MaxDuplicateCount = TailDuplicateSize;
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// Check the instructions in the block to determine whether tail-duplication
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// is invalid or unlikely to be profitable.
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unsigned InstrCount = 0;
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bool HasCall = false;
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for (MachineBasicBlock::iterator I = TailBB->begin();
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I != TailBB->end(); ++I) {
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// Non-duplicable things shouldn't be tail-duplicated.
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if (I->getDesc().isNotDuplicable()) return false;
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// Don't duplicate more than the threshold.
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if (InstrCount == MaxDuplicateCount) return false;
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// Remember if we saw a call.
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if (I->getDesc().isCall()) HasCall = true;
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if (I->getOpcode() != TargetInstrInfo::PHI)
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InstrCount += 1;
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}
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// Heuristically, don't tail-duplicate calls if it would expand code size,
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// as it's less likely to be worth the extra cost.
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if (InstrCount > 1 && HasCall)
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return false;
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// Iterate through all the unique predecessors and tail-duplicate this
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// block into them, if possible. Copying the list ahead of time also
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// avoids trouble with the predecessor list reallocating.
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bool Changed = false;
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SmallSetVector<MachineBasicBlock *, 8> Preds(TailBB->pred_begin(),
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TailBB->pred_end());
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for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
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PE = Preds.end(); PI != PE; ++PI) {
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MachineBasicBlock *PredBB = *PI;
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assert(TailBB != PredBB &&
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"Single-block loop should have been rejected earlier!");
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if (PredBB->succ_size() > 1) continue;
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MachineBasicBlock *PredTBB, *PredFBB;
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SmallVector<MachineOperand, 4> PredCond;
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if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
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continue;
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if (!PredCond.empty())
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continue;
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// EH edges are ignored by AnalyzeBranch.
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if (PredBB->succ_size() != 1)
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continue;
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// Don't duplicate into a fall-through predecessor (at least for now).
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if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
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continue;
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DEBUG(errs() << "\nTail-duplicating into PredBB: " << *PredBB
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<< "From Succ: " << *TailBB);
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// Remove PredBB's unconditional branch.
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TII->RemoveBranch(*PredBB);
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// Clone the contents of TailBB into PredBB.
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DenseMap<unsigned, unsigned> LocalVRMap;
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MachineBasicBlock::iterator I = TailBB->begin();
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MachineBasicBlock::iterator NI;
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for (MachineBasicBlock::iterator E = TailBB->end(); I != E; I = NI) {
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NI = next(I);
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if (I->getOpcode() == TargetInstrInfo::PHI) {
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// Replace the uses of the def of the PHI with the register coming
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// from PredBB.
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unsigned DefReg = I->getOperand(0).getReg();
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unsigned SrcOpIdx = getPHISrcRegOpIdx(I, PredBB);
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unsigned SrcReg = I->getOperand(SrcOpIdx).getReg();
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LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
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if (isDefLiveOut(DefReg, TailBB, MRI))
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AddSSAUpdateEntry(DefReg, SrcReg);
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// Remove PredBB from the PHI node.
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I->RemoveOperand(SrcOpIdx+1);
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I->RemoveOperand(SrcOpIdx);
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if (I->getNumOperands() == 1)
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I->eraseFromParent();
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continue;
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}
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// Replace def of virtual registers with new registers, and update uses
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// with PHI source register or the new registers.
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MachineInstr *NewMI = MF.CloneMachineInstr(I);
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for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = NewMI->getOperand(i);
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if (!MO.isReg())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
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continue;
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if (MO.isDef()) {
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const TargetRegisterClass *RC = MRI->getRegClass(Reg);
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unsigned NewReg = MRI->createVirtualRegister(RC);
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MO.setReg(NewReg);
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LocalVRMap.insert(std::make_pair(Reg, NewReg));
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if (isDefLiveOut(Reg, TailBB, MRI))
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AddSSAUpdateEntry(Reg, NewReg);
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} else {
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DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
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if (VI != LocalVRMap.end())
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MO.setReg(VI->second);
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}
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}
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PredBB->insert(PredBB->end(), NewMI);
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}
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NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
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// Update the CFG.
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PredBB->removeSuccessor(PredBB->succ_begin());
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assert(PredBB->succ_empty() &&
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"TailDuplicate called on block with multiple successors!");
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for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
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E = TailBB->succ_end(); I != E; ++I)
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PredBB->addSuccessor(*I);
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Changed = true;
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++NumTailDups;
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}
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// If TailBB was duplicated into all its predecessors except for the prior
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// block, which falls through unconditionally, move the contents of this
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// block into the prior block.
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MachineBasicBlock &PrevBB = *prior(MachineFunction::iterator(TailBB));
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MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
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SmallVector<MachineOperand, 4> PriorCond;
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bool PriorUnAnalyzable =
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TII->AnalyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
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// This has to check PrevBB->succ_size() because EH edges are ignored by
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// AnalyzeBranch.
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if (!PriorUnAnalyzable && PriorCond.empty() && !PriorTBB &&
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TailBB->pred_size() == 1 && PrevBB.succ_size() == 1 &&
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!TailBB->hasAddressTaken()) {
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DEBUG(errs() << "\nMerging into block: " << PrevBB
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<< "From MBB: " << *TailBB);
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PrevBB.splice(PrevBB.end(), TailBB, TailBB->begin(), TailBB->end());
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PrevBB.removeSuccessor(PrevBB.succ_begin());;
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assert(PrevBB.succ_empty());
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PrevBB.transferSuccessors(TailBB);
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Changed = true;
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}
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return Changed;
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}
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/// RemoveDeadBlock - Remove the specified dead machine basic block from the
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/// function, updating the CFG.
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void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
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assert(MBB->pred_empty() && "MBB must be dead!");
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DEBUG(errs() << "\nRemoving MBB: " << *MBB);
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// Remove all successors.
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while (!MBB->succ_empty())
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MBB->removeSuccessor(MBB->succ_end()-1);
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// If there are any labels in the basic block, unregister them from
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// MachineModuleInfo.
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if (MMI && !MBB->empty()) {
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
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I != E; ++I) {
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if (I->isLabel())
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// The label ID # is always operand #0, an immediate.
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MMI->InvalidateLabel(I->getOperand(0).getImm());
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}
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}
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// Remove the block.
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MBB->eraseFromParent();
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}
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