Michael Liao af4c7300b9 Fix PRFCHW test on non-x86 builds ...

- 'prefetch' intrinsics are only lowered when SSE is available. On non-X86
  builds, 'generic' CPU is used and stops lowering any prefetch intrinsics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178046 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-26 18:15:45 +00:00

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AArch64

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ARM

Reorder the DIFile field in DILexicalBlock to become a prefix common with other DIScopes

2013-03-22 05:47:44 +00:00

CPP

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Generic

XFAIL some of the generic CodeGen tests for Hexagon.

2013-03-25 21:04:16 +00:00

Hexagon

Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.

2013-03-26 15:43:57 +00:00

Inputs

Remove unused field in DISubprogram

2013-03-21 20:28:52 +00:00

MBlaze

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Mips

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MSP430

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NVPTX

[NVPTX] Fix handling of vector arguments

2013-03-24 21:17:47 +00:00

PowerPC

Fix a register-class comparison bug in PPCCTRLoops

2013-03-21 23:23:34 +00:00

R600

R600/SI: mark most intrinsics as readnone v2

2013-03-26 14:03:57 +00:00

SI

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SPARC

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Thumb

Reorder the DIFile field in DILexicalBlock to become a prefix common with other DIScopes

2013-03-22 05:47:44 +00:00

Thumb2

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X86

Fix PRFCHW test on non-x86 builds

2013-03-26 18:15:45 +00:00

XCore

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