mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-03 14:21:30 +00:00
793ce99ea7
As on other hosts, the CPU identification instruction is priveleged, so we need to look through /proc/cpuinfo. I copied the PowerPC way of handling "generic". Several tests were implicitly assuming z10 and so failed on z196. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193742 91177308-0d34-0410-b5e6-96231b3b80d8
320 lines
8.3 KiB
LLVM
320 lines
8.3 KiB
LLVM
; Test 32-bit floating-point comparison. The tests assume a z10 implementation
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; of select, using conditional branches rather than LOCGR.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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declare float @foo()
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; Check comparison with registers.
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define i64 @f1(i64 %a, i64 %b, float %f1, float %f2) {
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; CHECK-LABEL: f1:
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; CHECK: cebr %f0, %f2
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the low end of the CEB range.
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define i64 @f2(i64 %a, i64 %b, float %f1, float *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f2 = load float *%ptr
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the high end of the aligned CEB range.
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define i64 @f3(i64 %a, i64 %b, float %f1, float *%base) {
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; CHECK-LABEL: f3:
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; CHECK: ceb %f0, 4092(%r4)
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 1023
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%f2 = load float *%ptr
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f4(i64 %a, i64 %b, float %f1, float *%base) {
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; CHECK-LABEL: f4:
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; CHECK: aghi %r4, 4096
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 1024
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%f2 = load float *%ptr
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check negative displacements, which also need separate address logic.
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define i64 @f5(i64 %a, i64 %b, float %f1, float *%base) {
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; CHECK-LABEL: f5:
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; CHECK: aghi %r4, -4
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 -1
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%f2 = load float *%ptr
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check that CEB allows indices.
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define i64 @f6(i64 %a, i64 %b, float %f1, float *%base, i64 %index) {
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; CHECK-LABEL: f6:
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; CHECK: sllg %r1, %r5, 2
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; CHECK: ceb %f0, 400(%r1,%r4)
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%ptr1 = getelementptr float *%base, i64 %index
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%ptr2 = getelementptr float *%ptr1, i64 100
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%f2 = load float *%ptr2
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check that comparisons of spilled values can use CEB rather than CEBR.
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define float @f7(float *%ptr0) {
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; CHECK-LABEL: f7:
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; CHECK: brasl %r14, foo@PLT
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; CHECK: ceb {{%f[0-9]+}}, 16{{[04]}}(%r15)
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; CHECK: br %r14
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%ptr1 = getelementptr float *%ptr0, i64 2
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%ptr2 = getelementptr float *%ptr0, i64 4
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%ptr3 = getelementptr float *%ptr0, i64 6
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%ptr4 = getelementptr float *%ptr0, i64 8
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%ptr5 = getelementptr float *%ptr0, i64 10
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%ptr6 = getelementptr float *%ptr0, i64 12
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%ptr7 = getelementptr float *%ptr0, i64 14
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%ptr8 = getelementptr float *%ptr0, i64 16
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%ptr9 = getelementptr float *%ptr0, i64 18
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%ptr10 = getelementptr float *%ptr0, i64 20
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%val0 = load float *%ptr0
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%val1 = load float *%ptr1
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%val2 = load float *%ptr2
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%val3 = load float *%ptr3
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%val4 = load float *%ptr4
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%val5 = load float *%ptr5
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%val6 = load float *%ptr6
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%val7 = load float *%ptr7
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%val8 = load float *%ptr8
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%val9 = load float *%ptr9
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%val10 = load float *%ptr10
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%ret = call float @foo()
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%cmp0 = fcmp olt float %ret, %val0
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%cmp1 = fcmp olt float %ret, %val1
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%cmp2 = fcmp olt float %ret, %val2
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%cmp3 = fcmp olt float %ret, %val3
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%cmp4 = fcmp olt float %ret, %val4
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%cmp5 = fcmp olt float %ret, %val5
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%cmp6 = fcmp olt float %ret, %val6
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%cmp7 = fcmp olt float %ret, %val7
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%cmp8 = fcmp olt float %ret, %val8
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%cmp9 = fcmp olt float %ret, %val9
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%cmp10 = fcmp olt float %ret, %val10
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%sel0 = select i1 %cmp0, float %ret, float 0.0
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%sel1 = select i1 %cmp1, float %sel0, float 1.0
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%sel2 = select i1 %cmp2, float %sel1, float 2.0
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%sel3 = select i1 %cmp3, float %sel2, float 3.0
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%sel4 = select i1 %cmp4, float %sel3, float 4.0
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%sel5 = select i1 %cmp5, float %sel4, float 5.0
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%sel6 = select i1 %cmp6, float %sel5, float 6.0
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%sel7 = select i1 %cmp7, float %sel6, float 7.0
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%sel8 = select i1 %cmp8, float %sel7, float 8.0
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%sel9 = select i1 %cmp9, float %sel8, float 9.0
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%sel10 = select i1 %cmp10, float %sel9, float 10.0
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ret float %sel10
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}
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; Check comparison with zero.
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define i64 @f8(i64 %a, i64 %b, float %f) {
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; CHECK-LABEL: f8:
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; CHECK: ltebr %f0, %f0
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; CHECK-NEXT: je
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%cond = fcmp oeq float %f, 0.0
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the comparison can be reversed if that allows CEB to be used,
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; first with oeq.
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define i64 @f9(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f9:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: je {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp oeq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then one.
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define i64 @f10(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f10:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jlh {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp one float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then olt.
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define i64 @f11(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f11:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jh {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp olt float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then ole.
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define i64 @f12(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f12:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jhe {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp ole float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then oge.
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define i64 @f13(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f13:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jle {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp oge float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then ogt.
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define i64 @f14(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f14:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jl {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp ogt float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then ueq.
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define i64 @f15(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f15:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jnlh {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp ueq float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then une.
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define i64 @f16(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f16:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jne {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp une float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then ult.
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define i64 @f17(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f17:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jnle {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp ult float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then ule.
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define i64 @f18(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f18:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jnl {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp ule float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then uge.
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define i64 @f19(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f19:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jnh {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp uge float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; ...then ugt.
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define i64 @f20(i64 %a, i64 %b, float %f2, float *%ptr) {
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; CHECK-LABEL: f20:
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; CHECK: ceb %f0, 0(%r4)
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; CHECK-NEXT: jnhe {{\.L.*}}
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; CHECK: lgr %r2, %r3
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; CHECK: br %r14
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%f1 = load float *%ptr
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%cond = fcmp ugt float %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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