mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-15 07:34:33 +00:00
b5523ce1bb
These were pretty straightforward instructions, with some assembly support required for HLT. The ARM assembler is keen to split the instruction mnemonic into a (non-existent) 'H' instruction with the LT condition code. An exception for HLT is needed. HLT follows the same rules as BKPT when in IT blocks, so the special BKPT hadling code has been adapted to handle HLT also. Regression tests added including diagnostic tests for out of range immediates and illegal condition codes, as well as negative tests for pre-ARMv8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190053 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
673 B
ArmAsm
18 lines
673 B
ArmAsm
@ New ARMv8 A32 encodings
|
|
|
|
@ RUN: llvm-mc -triple armv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
|
|
@ RUN: not llvm-mc -triple armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
|
|
|
|
@ HLT
|
|
hlt #0
|
|
hlt #65535
|
|
@ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
|
|
@ CHECK-V8: hlt #65535 @ encoding: [0x7f,0xff,0x0f,0xe1]
|
|
@ CHECK-V7: error: instruction requires: armv8
|
|
@ CHECK-V7: error: instruction requires: armv8
|
|
|
|
@ AL condition code allowable
|
|
hltal #0
|
|
@ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
|
|
@ CHECK-V7: error: instruction requires: armv8
|