llvm-6502/lib/Target/PowerPC
Nate Begeman b65eadb7f5 remove some things from the todo list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 18:46:54 +00:00
..
LICENSE.TXT
Makefile Rewrite targets/rules to generate files for just PowerPC or PPC{32,64} 2004-08-17 05:11:54 +00:00
PowerPCInstrInfo.h
PowerPCRegisterInfo.h
PowerPCTargetMachine.h Move variables and methods which need PPC{32,64}* distinction to subclasses 2004-08-17 05:08:44 +00:00
PPC32.td
PPC32AsmPrinter.cpp Clean up floating point instruction selection. 2004-08-19 05:20:54 +00:00
PPC32ISelSimple.cpp Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file. 2004-08-20 09:56:22 +00:00
PPC32JITInfo.h
PPC32RegisterInfo.td Re-fix hiding the Frame Pointer from the register allocator in functions 2004-08-17 07:17:44 +00:00
PPC64.td Use the appropriate 64-bit register description file. 2004-08-19 19:36:57 +00:00
PPC64AsmPrinter.cpp Fix opcodes being printed in caps (the more general fix may be `AsmWriter') 2004-08-19 21:56:12 +00:00
PPC64CodeEmitter.cpp
PPC64InstrInfo.cpp
PPC64InstrInfo.h
PPC64ISelSimple.cpp Stack space for argument passing is 32 regardless of 32- vs. 64-bit arch. 2004-08-19 21:51:19 +00:00
PPC64JITInfo.h
PPC64RegisterInfo.cpp Wrap long lines. 2004-08-19 16:28:30 +00:00
PPC64RegisterInfo.h
PPC64RegisterInfo.td Re-fix hiding the Frame Pointer from the register allocator in functions 2004-08-17 07:17:44 +00:00
PPC64TargetMachine.h
PPC.h Consistently name passed with 32 or 64 in their name 2004-08-17 05:02:58 +00:00
PPCAsmPrinter.cpp Clean up floating point instruction selection. 2004-08-19 05:20:54 +00:00
PPCBranchSelector.cpp
PPCCodeEmitter.cpp
PPCFrameInfo.h LR needs to be saved at 16-byte offset on a 64-bit arch 2004-08-19 21:36:14 +00:00
PPCInstrBuilder.h
PPCInstrFormats.td
PPCInstrInfo.cpp
PPCInstrInfo.h
PPCInstrInfo.td Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file. 2004-08-20 09:56:22 +00:00
PPCJITInfo.h
PPCRegisterInfo.cpp
PPCRegisterInfo.h
PPCRegisterInfo.td Register classes are target-dependent 2004-08-17 05:10:31 +00:00
PPCTargetMachine.cpp Do not register ppc64 yet, as it breaks the SparcV9 backend 2004-08-20 18:09:18 +00:00
PPCTargetMachine.h
README.txt remove some things from the todo list. 2004-08-20 18:46:54 +00:00

TODO:
* use stfiwx in float->int
* implement cast fp to bool
* implement algebraic shift right long by reg
* implement scheduling info
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* fix rlwimi generation to be use-and-def
* fix ulong to double:
  floatdidf assumes signed longs.  so if the high but of a ulong
  just happens to be set, you get the wrong sign.  The fix for this
  is to call cmpdi2 to compare against zero, if so shift right by one,
  convert to fp, and multiply by (add to itself).  the sequence would
  look like:
  {r3:r4} holds ulong a;
  li r5, 0
  li r6, 0 (set r5:r6 to ulong 0)
  call cmpdi2 ==> sets r3 <, =, > 0
  if r3 > 0
  call floatdidf as usual
  else
  shift right ulong a, 1 (we could use emitShift)
  call floatdidf
  fadd f1, f1, f1 (fp left shift by 1)
* cast elimination pass (uint -> sbyte -> short, kill the byte -> short)
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* SingleSource
  `- Regression
  |  `- casts (ulong to fp failure)
* MultiSource
  |- Applications
  |  `- hbd: miscompilation