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b6db95f42b7c3b58f980e387d20ddb3e16bffd56
llvm-6502/test/CodeGen
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Benjamin Kramer 4dc478308f When lowering an inreg sext first shift left, then right arithmetically.
Shifting right two times will only yield zero. Should fix
SingleSource/UnitTests/SignlessTypes/factor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12 19:06:44 +00:00
..
ARM
Simplify writing floating types to assembly.
2013-01-11 10:36:13 +00:00
CPP
…
Generic
For inline asm:
2013-01-11 18:12:39 +00:00
Hexagon
In hexagon convertToHardwareLoop, don't deref end() iterator
2012-12-07 21:03:15 +00:00
MBlaze
…
Mips
[mips] MipsTargetLowering::getSetCCResultType should return a vector type if
2013-01-04 20:06:01 +00:00
MSP430
…
NVPTX
[NVPTX] Fix crash with unnamed struct arguments
2012-12-05 20:50:28 +00:00
PowerPC
When lowering an inreg sext first shift left, then right arithmetically.
2013-01-12 19:06:44 +00:00
R600
DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
2013-01-02 22:13:01 +00:00
SI
Add R600 backend
2012-12-11 21:25:42 +00:00
SPARC
…
Thumb
Use the 'count' attribute to calculate the upper bound of an array.
2012-12-04 21:34:03 +00:00
Thumb2
On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,
2012-12-20 19:59:30 +00:00
X86
Update patch for the pad short functions pass for Intel Atom (only).
2013-01-11 22:06:56 +00:00
XCore
…
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