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b71d385494
now that we have a correct and cached subtarget specific to the function. Also, finish providing a cached per-function subtarget in the core LLVMTargetMachine -- that layer hadn't switched over yet. The only use of the TargetMachine was to re-lookup a subtarget for a particular function to work around the fact that TTI was immutable. Now that it is per-function and we haved a cached subtarget, use it. This still leaves a few interfaces with real warts on them where we were passing Function objects through the TTI interface. I'll remove these and clean their usage up in subsequent commits now that this isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227738 91177308-0d34-0410-b5e6-96231b3b80d8
105 lines
3.6 KiB
C++
105 lines
3.6 KiB
C++
//===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file a TargetTransformInfo::Concept conforming object specific to the
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/// PPC target machine. It uses the target's detailed information to
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/// provide more precise answers to certain TTI queries, while letting the
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/// target independent and default TTI implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
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#include "PPC.h"
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#include "PPCTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
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typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const PPCSubtarget *ST;
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const PPCTargetLowering *TLI;
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const PPCSubtarget *getST() const { return ST; }
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const PPCTargetLowering *getTLI() const { return TLI; }
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public:
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explicit PPCTTIImpl(const PPCTargetMachine *TM, Function &F)
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: BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
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// Provide value semantics. MSVC requires that we spell all of these out.
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PPCTTIImpl(const PPCTTIImpl &Arg)
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: BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
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PPCTTIImpl(PPCTTIImpl &&Arg)
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: BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
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TLI(std::move(Arg.TLI)) {}
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PPCTTIImpl &operator=(const PPCTTIImpl &RHS) {
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BaseT::operator=(static_cast<const BaseT &>(RHS));
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ST = RHS.ST;
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TLI = RHS.TLI;
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return *this;
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}
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PPCTTIImpl &operator=(PPCTTIImpl &&RHS) {
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BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
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ST = std::move(RHS.ST);
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TLI = std::move(RHS.TLI);
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return *this;
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}
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/// \name Scalar TTI Implementations
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/// @{
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using BaseT::getIntImmCost;
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unsigned getIntImmCost(const APInt &Imm, Type *Ty);
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unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
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Type *Ty);
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unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty);
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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void getUnrollingPreferences(const Function *F, Loop *L,
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TTI::UnrollingPreferences &UP);
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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unsigned getNumberOfRegisters(bool Vector);
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unsigned getRegisterBitWidth(bool Vector);
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unsigned getMaxInterleaveFactor();
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unsigned getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
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unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
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Type *SubTp);
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unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
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unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
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unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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unsigned AddressSpace);
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/// @}
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};
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} // end namespace llvm
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#endif
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