Justin Holewinski 728af3d574 [NVPTX] Add support for module-scope inline asm ... Since we were explicitly not calling AsmPrinter::doInitialization, any module-scope inline asm was not being printed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185336 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-01 13:00:14 +00:00
..
add-128bit.ll	[NVPTX] 64-bit ADDC/ADDE are not legal	2013-07-01 12:59:04 +00:00
annotations.ll
arithmetic-fp-sm20.ll
arithmetic-int.ll
calling-conv.ll
compare-int.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
convert-fp.ll
convert-int-sm20.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
ctlz.ll	[NVPTX] Add support for cttz/ctlz/ctpop	2013-06-28 17:58:07 +00:00
ctpop.ll	[NVPTX] Add support for cttz/ctlz/ctpop	2013-06-28 17:58:07 +00:00
cttz.ll	[NVPTX] Add support for cttz/ctlz/ctpop	2013-06-28 17:58:07 +00:00
fma-disable.ll
fma.ll
generic-to-nvvm.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
global-ordering.ll
i1-global.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
i1-param.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
i8-param.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
intrin-nocapture.ll
intrinsic-old.ll
intrinsics.ll
ld-addrspace.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
ld-generic.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
ldu-i8.ll	[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value	2013-07-01 12:58:48 +00:00
ldu-reg-plus-offset.ll	[NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu.	2013-07-01 12:58:52 +00:00
lit.local.cfg
load-sext-i1.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
module-inline-asm.ll	[NVPTX] Add support for module-scope inline asm	2013-07-01 13:00:14 +00:00
nvvm-reflect.ll
param-align.ll
pr13291-i1-store.ll	[NVPTX] Clean up comparison/select/convert patterns and factor out PTX instructions from their patterns	2013-06-28 17:58:04 +00:00
pr16278.ll
ptx-version-30.ll
ptx-version-31.ll
refl1.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
rsqrt.ll	[NVPTX] Add (1.0 / sqrt(x)) => rsqrt(x) generation when allowable by FP flags	2013-06-28 17:58:13 +00:00
sched1.ll
sched2.ll
sext-in-reg.ll	[NVPTX] Add support for native SIGN_EXTEND_INREG where available	2013-07-01 12:58:56 +00:00
sext-params.ll	[NVPTX] Handle signext/zeroext attributes properly	2013-07-01 12:58:58 +00:00
simple-call.ll
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-35.ll
st-addrspace.ll	[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.	2013-06-28 17:57:59 +00:00
st-generic.ll	[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.	2013-06-28 17:57:59 +00:00
tuple-literal.ll
vec-param-load.ll	[NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos	2013-07-01 12:59:01 +00:00
vector-args.ll	[NVPTX] Add support for vectorized function return values	2013-06-28 17:57:55 +00:00
vector-compare.ll
vector-loads.ll
vector-select.ll