Chad Rosier 6b3c567613 [AArch64] Fix clobber computation in A57LoadBalancing pass. ...

Extremely difficult to reproduce, so no test case included.
PR21637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222677 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-24 18:57:58 +00:00

..

AsmParser

Remove StringMap::GetOrCreateValue in favor of StringMap::insert

2014-11-19 05:49:42 +00:00

Disassembler

Pass an ArrayRef to MCDisassembler::getInstruction.

2014-11-12 02:04:27 +00:00

InstPrinter

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MCTargetDesc

Rename variables to conform to llvm coding standards.

2014-11-03 23:24:10 +00:00

TargetInfo

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Utils

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AArch64.h

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AArch64.td

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AArch64A53Fix835769.cpp

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AArch64A57FPLoadBalancing.cpp

[AArch64] Fix clobber computation in A57LoadBalancing pass.

2014-11-24 18:57:58 +00:00

AArch64AddressTypePromotion.cpp

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AArch64AdvSIMDScalarPass.cpp

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AArch64AsmPrinter.cpp

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AArch64BranchRelaxation.cpp

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AArch64CallingConvention.td

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AArch64CleanupLocalDynamicTLSPass.cpp

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AArch64CollectLOH.cpp

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AArch64ConditionalCompares.cpp

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AArch64ConditionOptimizer.cpp

[AArch64] Check Dest Register Liveness in CondOpt pass.

2014-10-31 19:02:38 +00:00

AArch64DeadRegisterDefinitionsPass.cpp

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AArch64ExpandPseudoInsts.cpp

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AArch64FastISel.cpp

[FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmetic

2014-11-18 22:41:49 +00:00

AArch64FrameLowering.cpp

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AArch64FrameLowering.h

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AArch64InstrAtomics.td

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AArch64InstrFormats.td

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AArch64InstrInfo.cpp

[AArch64] Don't optimize all compare instructions.

2014-11-18 21:02:40 +00:00

AArch64InstrInfo.h

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AArch64InstrInfo.td

AArch64: Pattern match integer vector abs like we do on ARM.

2014-11-04 20:10:06 +00:00

AArch64ISelDAGToDAG.cpp

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AArch64ISelLowering.cpp

DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.

2014-11-21 06:39:58 +00:00

AArch64ISelLowering.h

DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.

2014-11-21 06:39:58 +00:00

AArch64LoadStoreOptimizer.cpp

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AArch64MachineCombinerPattern.h

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AArch64MachineFunctionInfo.h

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AArch64MCInstLower.cpp

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AArch64MCInstLower.h

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AArch64PBQPRegAlloc.cpp

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AArch64PBQPRegAlloc.h

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AArch64PerfectShuffle.h

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AArch64PromoteConstant.cpp

Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool>

2014-11-19 07:49:26 +00:00

AArch64RegisterInfo.cpp

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AArch64RegisterInfo.h

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AArch64RegisterInfo.td

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AArch64SchedA53.td

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AArch64SchedA57.td

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AArch64SchedA57WriteRes.td

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AArch64SchedCyclone.td

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AArch64Schedule.td

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AArch64SelectionDAGInfo.cpp

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AArch64SelectionDAGInfo.h

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AArch64StorePairSuppress.cpp

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AArch64Subtarget.cpp

Remove redundant calls to isMaterializable.

2014-11-01 16:46:18 +00:00

AArch64Subtarget.h

[AArch64] Disable useAA for Cortex-A57.

2014-11-19 06:48:56 +00:00

AArch64TargetMachine.cpp

Add out of line virtual destructors to all LLVMTargetMachine subclasses

2014-11-20 23:37:18 +00:00

AArch64TargetMachine.h

Add out of line virtual destructors to all LLVMTargetMachine subclasses

2014-11-20 23:37:18 +00:00

AArch64TargetObjectFile.cpp

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AArch64TargetObjectFile.h

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AArch64TargetTransformInfo.cpp

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CMakeLists.txt

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LLVMBuild.txt

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Makefile

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