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https://github.com/c64scene-ar/llvm-6502.git
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8ade909308
When testing the asm parser, I ran into an error when using a conditional branch to an external symbol (this doesn't occur in compiler-generated code) due to missing support in PPCELFObjectWriter::getRelocTypeInner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180605 91177308-0d34-0410-b5e6-96231b3b80d8
281 lines
9.3 KiB
C++
281 lines
9.3 KiB
C++
//===-- PPCELFObjectWriter.cpp - PPC ELF Writer ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "MCTargetDesc/PPCFixupKinds.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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namespace {
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class PPCELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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PPCELFObjectWriter(bool Is64Bit, uint8_t OSABI);
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virtual ~PPCELFObjectWriter();
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protected:
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virtual unsigned getRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const;
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virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel, bool IsRelocWithSymbol,
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int64_t Addend) const;
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virtual const MCSymbol *undefinedExplicitRelSym(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const;
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virtual void adjustFixupOffset(const MCFixup &Fixup, uint64_t &RelocOffset);
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virtual void sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs);
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};
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class PPCELFRelocationEntry : public ELFRelocationEntry {
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public:
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PPCELFRelocationEntry(const ELFRelocationEntry &RE);
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bool operator<(const PPCELFRelocationEntry &RE) const {
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return (RE.r_offset < r_offset ||
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(RE.r_offset == r_offset && RE.Type > Type));
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}
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};
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}
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PPCELFRelocationEntry::PPCELFRelocationEntry(const ELFRelocationEntry &RE)
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: ELFRelocationEntry(RE.r_offset, RE.Index, RE.Type, RE.Symbol,
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RE.r_addend, *RE.Fixup) {}
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PPCELFObjectWriter::PPCELFObjectWriter(bool Is64Bit, uint8_t OSABI)
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: MCELFObjectTargetWriter(Is64Bit, OSABI,
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Is64Bit ? ELF::EM_PPC64 : ELF::EM_PPC,
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/*HasRelocationAddend*/ true) {}
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PPCELFObjectWriter::~PPCELFObjectWriter() {
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}
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unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const
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{
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MCSymbolRefExpr::VariantKind Modifier = Target.isAbsolute() ?
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MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
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// determine the type of the relocation
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unsigned Type;
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if (IsPCRel) {
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switch ((unsigned)Fixup.getKind()) {
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default:
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llvm_unreachable("Unimplemented");
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case PPC::fixup_ppc_br24:
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Type = ELF::R_PPC_REL24;
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break;
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case PPC::fixup_ppc_brcond14:
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Type = ELF::R_PPC_REL14;
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break;
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case FK_Data_4:
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case FK_PCRel_4:
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Type = ELF::R_PPC_REL32;
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break;
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case FK_Data_8:
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case FK_PCRel_8:
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Type = ELF::R_PPC64_REL64;
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break;
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}
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} else {
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switch ((unsigned)Fixup.getKind()) {
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default: llvm_unreachable("invalid fixup kind!");
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case PPC::fixup_ppc_br24:
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Type = ELF::R_PPC_ADDR24;
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break;
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case PPC::fixup_ppc_brcond14:
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Type = ELF::R_PPC_ADDR14; // XXX: or BRNTAKEN?_
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break;
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case PPC::fixup_ppc_ha16:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_PPC_TPREL16_HA:
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Type = ELF::R_PPC_TPREL16_HA;
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break;
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case MCSymbolRefExpr::VK_PPC_DTPREL16_HA:
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Type = ELF::R_PPC64_DTPREL16_HA;
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break;
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_PPC_ADDR16_HA;
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break;
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case MCSymbolRefExpr::VK_PPC_TOC16_HA:
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Type = ELF::R_PPC64_TOC16_HA;
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break;
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case MCSymbolRefExpr::VK_PPC_GOT_TPREL16_HA:
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Type = ELF::R_PPC64_GOT_TPREL16_HA;
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break;
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case MCSymbolRefExpr::VK_PPC_GOT_TLSGD16_HA:
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Type = ELF::R_PPC64_GOT_TLSGD16_HA;
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break;
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case MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_HA:
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Type = ELF::R_PPC64_GOT_TLSLD16_HA;
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break;
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}
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break;
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case PPC::fixup_ppc_lo16:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_PPC_TPREL16_LO:
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Type = ELF::R_PPC_TPREL16_LO;
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break;
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case MCSymbolRefExpr::VK_PPC_DTPREL16_LO:
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Type = ELF::R_PPC64_DTPREL16_LO;
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break;
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_PPC_ADDR16_LO;
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break;
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case MCSymbolRefExpr::VK_PPC_TOC_ENTRY:
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Type = ELF::R_PPC64_TOC16;
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break;
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case MCSymbolRefExpr::VK_PPC_TOC16_LO:
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Type = ELF::R_PPC64_TOC16_LO;
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break;
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case MCSymbolRefExpr::VK_PPC_GOT_TLSGD16_LO:
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Type = ELF::R_PPC64_GOT_TLSGD16_LO;
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break;
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case MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_LO:
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Type = ELF::R_PPC64_GOT_TLSLD16_LO;
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break;
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}
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break;
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case PPC::fixup_ppc_lo16_ds:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_PPC64_ADDR16_DS;
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break;
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case MCSymbolRefExpr::VK_PPC_TOC_ENTRY:
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Type = ELF::R_PPC64_TOC16_DS;
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break;
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case MCSymbolRefExpr::VK_PPC_TOC16_LO:
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Type = ELF::R_PPC64_TOC16_LO_DS;
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break;
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case MCSymbolRefExpr::VK_PPC_GOT_TPREL16_LO:
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Type = ELF::R_PPC64_GOT_TPREL16_LO_DS;
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break;
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}
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break;
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case PPC::fixup_ppc_tlsreg:
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Type = ELF::R_PPC64_TLS;
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break;
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case PPC::fixup_ppc_nofixup:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_PPC_TLSGD:
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Type = ELF::R_PPC64_TLSGD;
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break;
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case MCSymbolRefExpr::VK_PPC_TLSLD:
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Type = ELF::R_PPC64_TLSLD;
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break;
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}
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break;
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case FK_Data_8:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_PPC_TOC:
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Type = ELF::R_PPC64_TOC;
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break;
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_PPC64_ADDR64;
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break;
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}
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break;
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case FK_Data_4:
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Type = ELF::R_PPC_ADDR32;
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break;
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case FK_Data_2:
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Type = ELF::R_PPC_ADDR16;
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break;
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}
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}
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return Type;
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}
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unsigned PPCELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel,
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bool IsRelocWithSymbol,
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int64_t Addend) const {
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return getRelocTypeInner(Target, Fixup, IsPCRel);
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}
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const MCSymbol *PPCELFObjectWriter::undefinedExplicitRelSym(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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assert(Target.getSymA() && "SymA cannot be 0");
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const MCSymbol &Symbol = Target.getSymA()->getSymbol().AliasedSymbol();
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unsigned RelocType = getRelocTypeInner(Target, Fixup, IsPCRel);
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// The .odp creation emits a relocation against the symbol ".TOC." which
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// create a R_PPC64_TOC relocation. However the relocation symbol name
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// in final object creation should be NULL, since the symbol does not
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// really exist, it is just the reference to TOC base for the current
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// object file.
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bool EmitThisSym = RelocType != ELF::R_PPC64_TOC;
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if (EmitThisSym && !Symbol.isTemporary())
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return &Symbol;
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return NULL;
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}
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void PPCELFObjectWriter::
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adjustFixupOffset(const MCFixup &Fixup, uint64_t &RelocOffset) {
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switch ((unsigned)Fixup.getKind()) {
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case PPC::fixup_ppc_ha16:
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case PPC::fixup_ppc_lo16:
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case PPC::fixup_ppc_lo16_ds:
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RelocOffset += 2;
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break;
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default:
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break;
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}
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}
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// The standard sorter only sorts on the r_offset field, but PowerPC can
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// have multiple relocations at the same offset. Sort secondarily on the
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// relocation type to avoid nondeterminism.
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void PPCELFObjectWriter::sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs) {
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// Copy to a temporary vector of relocation entries having a different
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// sort function.
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std::vector<PPCELFRelocationEntry> TmpRelocs;
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for (std::vector<ELFRelocationEntry>::iterator R = Relocs.begin();
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R != Relocs.end(); ++R) {
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TmpRelocs.push_back(PPCELFRelocationEntry(*R));
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}
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// Sort in place by ascending r_offset and descending r_type.
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array_pod_sort(TmpRelocs.begin(), TmpRelocs.end());
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// Copy back to the original vector.
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unsigned I = 0;
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for (std::vector<PPCELFRelocationEntry>::iterator R = TmpRelocs.begin();
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R != TmpRelocs.end(); ++R, ++I) {
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Relocs[I] = ELFRelocationEntry(R->r_offset, R->Index, R->Type,
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R->Symbol, R->r_addend, *R->Fixup);
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}
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}
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MCObjectWriter *llvm::createPPCELFObjectWriter(raw_ostream &OS,
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bool Is64Bit,
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uint8_t OSABI) {
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MCELFObjectTargetWriter *MOTW = new PPCELFObjectWriter(Is64Bit, OSABI);
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return createELFObjectWriter(MOTW, OS, /*IsLittleEndian=*/false);
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}
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