1
0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-28 21:38:44 +00:00
llvm-6502/test/CodeGen/X86/h-register-addressing-64.ll
NAKAMURA Takumi b9edd20706 llvm/test/CodeGen/X86: Update tests with -mattr=-bmi not to take BMI, corresponding to Craig's r189742.
AMD Piledriver builder detected failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189754 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 12:00:46 +00:00

54 lines
1.6 KiB
LLVM

; RUN: llc < %s -march=x86-64 -mattr=-bmi | grep "movzbl %[abcd]h," | count 7
; Use h-register extract and zero-extend.
define double @foo8(double* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
%t2 = getelementptr double* %p, i64 %t1
%t3 = load double* %t2, align 8
ret double %t3
}
define float @foo4(float* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
%t2 = getelementptr float* %p, i64 %t1
%t3 = load float* %t2, align 8
ret float %t3
}
define i16 @foo2(i16* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
%t2 = getelementptr i16* %p, i64 %t1
%t3 = load i16* %t2, align 8
ret i16 %t3
}
define i8 @foo1(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
%t2 = getelementptr i8* %p, i64 %t1
%t3 = load i8* %t2, align 8
ret i8 %t3
}
define i8 @bar8(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 5
%t1 = and i64 %t0, 2040
%t2 = getelementptr i8* %p, i64 %t1
%t3 = load i8* %t2, align 8
ret i8 %t3
}
define i8 @bar4(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 6
%t1 = and i64 %t0, 1020
%t2 = getelementptr i8* %p, i64 %t1
%t3 = load i8* %t2, align 8
ret i8 %t3
}
define i8 @bar2(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
%t0 = lshr i64 %x, 7
%t1 = and i64 %t0, 510
%t2 = getelementptr i8* %p, i64 %t1
%t3 = load i8* %t2, align 8
ret i8 %t3
}