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bba8da2ba0
we generate PHI nodes with multiple entries from the same basic block but with different values. Enabling CSE on ExtractElement instructions make sure that all of the RAUWed instructions are the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195773 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.7 KiB
LLVM
48 lines
1.7 KiB
LLVM
; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
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target triple = "i386-pc-linux"
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; Function Attrs: nounwind
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define i32 @_Z16adjustFixupValueyj(i64 %Value, i32 %Kind) {
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entry:
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%extract.t = trunc i64 %Value to i32
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%extract = lshr i64 %Value, 12
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%extract.t6 = trunc i64 %extract to i32
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switch i32 %Kind, label %sw.default [
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i32 0, label %return
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i32 1, label %return
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i32 129, label %sw.bb1
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i32 130, label %sw.bb2
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]
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sw.default: ; preds = %entry
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call void @_Z25llvm_unreachable_internalv()
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unreachable
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sw.bb1: ; preds = %entry
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%shr = lshr i64 %Value, 16
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%extract.t5 = trunc i64 %shr to i32
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%extract7 = lshr i64 %Value, 28
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%extract.t8 = trunc i64 %extract7 to i32
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br label %sw.bb2
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sw.bb2: ; preds = %sw.bb1, %entry
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%Value.addr.0.off0 = phi i32 [ %extract.t, %entry ], [ %extract.t5, %sw.bb1 ]
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%Value.addr.0.off12 = phi i32 [ %extract.t6, %entry ], [ %extract.t8, %sw.bb1 ]
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%conv6 = and i32 %Value.addr.0.off0, 4095
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%conv4 = shl i32 %Value.addr.0.off12, 16
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%shl = and i32 %conv4, 983040
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%or = or i32 %shl, %conv6
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%or11 = or i32 %or, 8388608
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br label %return
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return: ; preds = %sw.bb2, %entry, %entry
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%retval.0 = phi i32 [ %or11, %sw.bb2 ], [ %extract.t, %entry ], [ %extract.t, %entry ]
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ret i32 %retval.0
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}
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; Function Attrs: noreturn
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declare void @_Z25llvm_unreachable_internalv()
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