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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-16 16:31:04 +00:00
Dan Gohman bc0b56732a The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 20:24:13 +00:00
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