Hal Finkel 5cad12d12a Fix PPC64 64-bit GPR inline asm constraint matching ... Internally, the PowerPC backend names the 32-bit GPRs R[0-9]+, and names the 64-bit parent GPRs X[0-9]+. When matching inline assembly constraints with explicit register names, on PPC64 when an i64 MVT has been requested, we need to follow gcc's convention of using r[0-9]+ to refer to the 64-bit (parent) registers. At some point, we'll probably want to arrange things so that the generic code in TargetLowering uses the AsmName fields declared in *RegisterInfo.td in order to match these inline asm register constraints. If we do that, this change can be reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187693 91177308-0d34-0410-b5e6-96231b3b80d8		2013-08-03 12:25:10 +00:00
..
Analysis	Fixes ARM LNT bot from SLP change in O3	2013-08-02 17:10:04 +00:00
Assembler
Bindings/Ocaml
Bitcode
BugPoint	Temporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached to	2013-08-02 00:49:44 +00:00
CodeGen	Fix PPC64 64-bit GPR inline asm constraint matching	2013-08-03 12:25:10 +00:00
DebugInfo	Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB (with fix for 64bits msvc)	2013-08-02 16:14:15 +00:00
ExecutionEngine
Feature	Temporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached to	2013-08-02 00:49:44 +00:00
FileCheck	Fix handling of CHECK-DAG combined with CHECK-NOT	2013-08-02 11:32:50 +00:00
Instrumentation
Integer
JitListener
Linker
MC	[ARMv8] Add an assembler warning for the deprecated 'setend' instruction.	2013-08-02 19:18:12 +00:00
Object
Other
TableGen
tools
Transforms	SLPVectorizer: Fix PR16777. PHInodes may use multiple extracted values that come from different blocks.	2013-08-02 18:40:24 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh