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bc4cf8d5b137d43a1d6fde8238184e47efe162be
llvm-6502/lib/CodeGen/SelectionDAG
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Chris Lattner bc4cf8d5b1 For better or worse, load from i1 is assumed to be zero extended. Do not
form a load from i1 from larger loads that may not be zext'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 04:40:53 +00:00
..
DAGCombiner.cpp
For better or worse, load from i1 is assumed to be zero extended. Do not
2006-11-27 04:40:53 +00:00
LegalizeDAG.cpp
If a brcond condition is promoted, make sure to zero extend it, even if not
2006-11-27 04:39:56 +00:00
Makefile
For PR780:
2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp
Matches MachineInstr changes.
2006-11-13 23:36:35 +00:00
ScheduleDAGList.cpp
Changes to use operand constraints to process two-address instructions.
2006-11-04 09:44:31 +00:00
ScheduleDAGRRList.cpp
Remove dead code; added a missing null ptr check.
2006-11-06 21:33:46 +00:00
ScheduleDAGSimple.cpp
For PR786:
2006-11-02 20:25:50 +00:00
SelectionDAG.cpp
Fix an incorrectly inverted condition.
2006-11-16 00:08:20 +00:00
SelectionDAGISel.cpp
For PR950:
2006-11-27 01:05:10 +00:00
SelectionDAGPrinter.cpp
Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build.
2006-11-17 13:07:55 +00:00
TargetLowering.cpp
Add a mechanism to specify whether a target supports a particular indexed load / store.
2006-11-09 18:56:43 +00:00
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