mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-03 14:21:30 +00:00
793ce99ea7
As on other hosts, the CPU identification instruction is priveleged, so we need to look through /proc/cpuinfo. I copied the PowerPC way of handling "generic". Several tests were implicitly assuming z10 and so failed on z196. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193742 91177308-0d34-0410-b5e6-96231b3b80d8
93 lines
2.9 KiB
LLVM
93 lines
2.9 KiB
LLVM
; Test spilling of GPRs. The tests here assume z10 register pressure,
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; without the high words being available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; We need to allocate a 4-byte spill slot, rounded to 8 bytes. The frame
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; size should be exactly 160 + 8 = 168.
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define void @f1(i32 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: stmg %r6, %r15, 48(%r15)
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; CHECK: aghi %r15, -168
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; CHECK-NOT: 160(%r15)
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; CHECK: st [[REGISTER:%r[0-9]+]], 164(%r15)
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; CHECK-NOT: 160(%r15)
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; CHECK: l [[REGISTER]], 164(%r15)
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; CHECK-NOT: 160(%r15)
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; CHECK: lmg %r6, %r15, 216(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l3 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l6 = load volatile i32 *%ptr
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%l7 = load volatile i32 *%ptr
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%l8 = load volatile i32 *%ptr
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%l9 = load volatile i32 *%ptr
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%l10 = load volatile i32 *%ptr
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%l11 = load volatile i32 *%ptr
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%l12 = load volatile i32 *%ptr
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%l13 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%lx = load volatile i32 *%ptr
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store volatile i32 %lx, i32 *%ptr
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store volatile i32 %l14, i32 *%ptr
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store volatile i32 %l13, i32 *%ptr
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store volatile i32 %l12, i32 *%ptr
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store volatile i32 %l11, i32 *%ptr
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store volatile i32 %l10, i32 *%ptr
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store volatile i32 %l9, i32 *%ptr
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store volatile i32 %l8, i32 *%ptr
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store volatile i32 %l7, i32 *%ptr
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store volatile i32 %l6, i32 *%ptr
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store volatile i32 %l5, i32 *%ptr
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store volatile i32 %l4, i32 *%ptr
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store volatile i32 %l3, i32 *%ptr
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store volatile i32 %l1, i32 *%ptr
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store volatile i32 %l0, i32 *%ptr
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ret void
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}
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; Same for i64, except that the full spill slot is used.
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define void @f2(i64 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: stmg %r6, %r15, 48(%r15)
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; CHECK: aghi %r15, -168
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; CHECK: stg [[REGISTER:%r[0-9]+]], 160(%r15)
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; CHECK: lg [[REGISTER]], 160(%r15)
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; CHECK: lmg %r6, %r15, 216(%r15)
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; CHECK: br %r14
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%l0 = load volatile i64 *%ptr
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%l1 = load volatile i64 *%ptr
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%l3 = load volatile i64 *%ptr
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%l4 = load volatile i64 *%ptr
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%l5 = load volatile i64 *%ptr
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%l6 = load volatile i64 *%ptr
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%l7 = load volatile i64 *%ptr
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%l8 = load volatile i64 *%ptr
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%l9 = load volatile i64 *%ptr
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%l10 = load volatile i64 *%ptr
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%l11 = load volatile i64 *%ptr
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%l12 = load volatile i64 *%ptr
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%l13 = load volatile i64 *%ptr
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%l14 = load volatile i64 *%ptr
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%lx = load volatile i64 *%ptr
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store volatile i64 %lx, i64 *%ptr
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store volatile i64 %l14, i64 *%ptr
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store volatile i64 %l13, i64 *%ptr
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store volatile i64 %l12, i64 *%ptr
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store volatile i64 %l11, i64 *%ptr
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store volatile i64 %l10, i64 *%ptr
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store volatile i64 %l9, i64 *%ptr
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store volatile i64 %l8, i64 *%ptr
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store volatile i64 %l7, i64 *%ptr
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store volatile i64 %l6, i64 *%ptr
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store volatile i64 %l5, i64 *%ptr
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store volatile i64 %l4, i64 *%ptr
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store volatile i64 %l3, i64 *%ptr
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store volatile i64 %l1, i64 *%ptr
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store volatile i64 %l0, i64 *%ptr
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ret void
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}
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